Semiconductor memory

Details Semiconductor memory Semiconductor memory

1993-03-12

1995-03-28

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

36518905, G11C 700

Patent

active

054023874

ABSTRACT:
A semiconductor memory including a memory cell array having a plurality of memory cells; an input buffer circuit for receiving an address signal having an amplitude at an interface level and generating at least one output signal having an amplitude at an internal logic level in accordance with said address signal, the input buffer circuit further receiving a first signal and changing the response characteristics thereof in response to the first signal; a detecting circuit for receiving the output signal and generating a detecting signal indicating whether the level of the output signal varies; and a control signal generating circuit for receiving the detecting signal and generating the first signal based on the detecting signal.

REFERENCES:
patent: 4337525 (1982-06-01), Akatsuka
patent: 4458337 (1984-07-01), Takomae et al.
patent: 4879681 (1989-11-01), Miwa et al.

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