Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With decomposition of a precursor
Reexamination Certificate
2005-07-12
2005-07-12
Kunemund, Robert (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Forming from vapor or gaseous state
With decomposition of a precursor
C117S094000, C117S101000, C117S106000, C117S902000
Reexamination Certificate
active
06916373
ABSTRACT:
A method for manufacturing a semiconductor using a wafer carrier, wherein the temperature of a wafer can be made uniform with few differences in surface composition distribution. A plurality of grooves are formed at the bottom of a wafer pocket of a wafer carrier, to make uniform the temperature of the wafer surface by diffusing heat. The grooves are deeper at the peripheral part of the wafer than at the central part, and groove density is higher at the peripheral part than at the central part. The groove patterns may include a plurality of wedge-shaped grooves widening from the central part toward the peripheral part, a plurality of circular grooves with narrowing interval therebetween from the central part toward the peripheral part, circular grooves with the diameter shortened from the central part toward the peripheral part, and square grooves with shortened sides from the central part toward the peripheral part.
REFERENCES:
patent: 3763379 (1973-10-01), Ashikawa et al.
patent: 4633476 (1986-12-01), Scifres et al.
patent: 6014979 (2000-01-01), Van Autryve et al.
patent: 59-228714 (1984-12-01), None
patent: 62-262417 (1987-11-01), None
patent: 04-162615 (1992-06-01), None
patent: 07-058035 (1995-03-01), None
patent: 07-273025 (1995-10-01), None
patent: 10-256200 (1998-09-01), None
patent: 2000-021788 (2000-01-01), None
R.W. Hoffman, Jr., “Wavelength Control of InGaAsP Laser Structures Using In-Situ Emissivity Corrected Pyrometry Temperature Control During MOCVD Growth,” 2001 International Conference on Indium Phosphide and Related Materials, Post Deadline Papers, 13th IPRM 14-18, May 2001, Nara, Japan, pp. 15 and 16.
Kunemund Robert
Oki Electric Industry Co. Ltd.
Volentine Francos & Whitt PLLC
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