Stone working – Work supports
Reexamination Certificate
1999-09-24
2002-03-05
Nguyen, George (Department: 3723)
Stone working
Work supports
Reexamination Certificate
active
06352073
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor manufacturing equipment for detaching and separating from a dicing sheet a plurality of semiconductor chips (hereinafter called chips) obtained by dicing a semiconductor wafer (hereinafter called wafer) fixed with the dicing sheet.
2. Description of Related Art
For years, IC chips were often buried in various thin cards. For example, in Japan, public phones operated by a telephone card with buried IC chips without direct contact have been brought into practical use. IC chips to be buried in such thin cards are shaped as very thin as 30 &mgr;m to 50 &mgr;m, for example. Similarly to ordinary IC chips, such thin IC chips are also made by building a plurality of chip portions on a wafer of a certain size, then dicing and separating the wafer into discrete IC chips to be used individually. Since the wafer, i.e., each IC chip, is as very thin as decades of serial 10 &mgr;m, each IC chip curves in the above-mentioned process, and its extension or contraction may adversely affect an internal circuit or wiring. This is the very issue the present invention remarks, and it is discussed below in greater detail.
Semiconductor devices, as products, are manufactured through many steps such as design step, masking step, step of making a wafer, wafer processing step for making semiconductor elements, integrating circuits and other internal circuits in the wafer, assembling step, and inspection step. Wafers are cut from an ingot and orientation flats are formed on the wafers in the wafer manufacturing step. Next, in the wafer processing step, transistors and integrating circuits are formed on the wafer. The wafer is fixed on a dicing sheet or a dicing tape, and diced along scribed lines. Each discrete chip obtained by dicing the wafer and having formed an integrated circuit and others is detached and separated from the dicing sheet. After the chip is detached from the dicing sheet, it is delivered to the assembling step for mounting it on a lead frame and sealing it by resin. Through some later steps, the product is completed.
FIG. 15
shows the structure of a conventional semiconductor manufacturing equipment for executing the assembling step of each chip detached and separated from a dicing sheet after a plurality of chips are obtained by dicing a wafer fixed by using a dicing sheet. The wafer
2
after being diced still remains bonded onto the dicing sheet. The wafer
2
mounted in a ring (wafer setting portion)
3
after the dicing step is set on a wafer table
4
. After that, chips are inspected by a detector
1
for discriminating acceptable products from defective products, and acceptable chips are detached from the dicing sheet and separated into discrete chips. After the chips are separated from the dicing sheet, they are transported to a position correcting stage
6
by means of an attraction force of an attraction head having an attraction collet, corrected in positional offset there, and thereafter mounted individually in lead frames or other enveloping means by using a bonding head
7
. After the process by the bonding head
7
, chips are transported to a dispense head
71
, and an adhesive is supplied to the enveloping means by using the dispense head
71
.
FIG. 16
are plan views and side-elevational views for explaining the procedure of removing the dicing sheet from chips in the step of discriminating acceptable chips and defective chips by the detector and separating acceptable chips individually by removing the dicing sheet from bottom surfaces of the chips. These drawings show aspects of a chip
10
detached from the dicing sheet
9
in three different stages in a time series, separately for a square chip and a rectangular chip. After discrimination of acceptable chips and defective chips and detection of chips by the detector, the interior of the backup holder
11
supporting a pin holder
12
is evacuated to a vacuum by a vacuum pump to thereby fix the dicing sheet
9
by the suction force. While the dicing sheet
9
is fixed, the pin holder
12
having push-up pins
8
is raised to press the push-up pins
8
onto bottom surface of the chip
10
. In this case, the pin holder
12
is raised to a certain height.
Explained below is the sequence of separation of the sheet from the bottom surface of the chip with reference to the drawings. In the way of upward movement the pin holder
12
, the dicing sheet
9
heretofore fixed on the backup holder
11
is partly released therefrom (step 1). When the pin holder
11
further rises, the dicing sheet
9
starts to come off from corner portions of the chip
10
(step 2). When the pin holder
12
further rises, the dicing sheet
9
is detached to the extent corresponding to the outer circumference of the push-up pins
8
(step 3). In the next step, not shown, the dicing sheet
9
is detached also inside of the push-up pins
8
(slower than the speed of detaching it to the outer circumference of the pins).
As the attraction collet (hereinafter called collet), there are a collet
15
configured to attract sides of a chip and a collet
14
configured to partly attract the surface of a chip as shown in
FIGS. 17A through 17D
. The collet
15
shown here is a two-plane tapered collet having two tapered planes. However, a four-plane tapered collet having four tapered planes is known as well. Used as materials of the collet are super-hard urethane, PCTFE (polychlorotrifuluoroethylene; Japanese trade name is “DAIFURON”) and polyimide resin (trade name is “VESPEL”), for example. The collet is configured to move to the level of the surface of the chip and partly attract the chip during its upward movement. The collet is brought into contact with the surface and the outer circumferential edge of the chip in some cases, or it is not in other cases, depending upon its configuration and material. Simultaneously with the upward movement of the push-up pin holder, the collet also moves upward and helps to detach the chip from the dicing sheet. That is, the collet behaves to correct the positional deviation and hold the balance of the chip while it is detached from the dicing sheet. After the chip is detached from the dicing sheet, it is transported to the position correcting stage as shown in FIG.
15
.
Typical one of conventionally used collets is configured as shown in
FIG. 18A
in which an attraction groove of the collet contacts the circumferential edge of a chip or a part of the surface of the chip. Therefore, if the chip
10
is thin, the chip
10
curves along the inner surface of the attraction groove of the collet when it is attracted by the collet
15
(collet A) as shown in FIG.
18
A. If the collet
4
(collet B), smaller than the chip size, is used, it cannot fix the outer circumferential edge of the chip
10
, as shown in
FIG. 18B
, and the corners of the chip
10
is not readily detached. As a result, the circumferential portion of the chip is pulled downward, and the chip
10
warps.
FIGS. 19A and 19B
are characteristic diagrams explaining dependency of such warps of chips upon attraction forces of the collet for different thicknesses of chips.
FIG. 19A
is the characteristic diagram of the collet A in
FIG. 18A
, and
FIG. 19B
is the characteristic diagram of the collet B of FIG.
18
B. In both cases, as the attract force of the collet decreases, the warp of the chip is reduced. However, the thicker the chip, the smaller the change in mount of the warp with the change in attraction force. As the chip becomes thinner and the attraction force becomes larger, the warp becomes larger.
Once a warp occurs in the chip, it causes expansion and contraction of wiring or other elements formed in the chip, thereby changes their characteristics, or causes breakage of wiring or other troubles which make the chip defective, or causes cracks of the chip.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a semiconductor manufacturing equipment and a semiconductor device manufacturing method using the semiconductor manu
Kurosawa Tetsuya
Numata Hideo
Tokubuchi Keisuke
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Nguyen George
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