Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2005-06-24
2009-02-17
Vu, Hung (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S206000, C257S365000, C257S369000
Reexamination Certificate
active
07491973
ABSTRACT:
Basic logic gates are formed in a small area, and a highly integrated and microscopic structure is provided. In an nMOSFET and a pMOSFET, gate electrodes are formed facing each other and sandwiching a semiconductor region via gate insulting layers. Respective drain regions of the nMOSFET and the pMOSFET are connected to each other. A high potential is applied to a source region of the pMOSFET while an intermediate potential between the high and a low potential is applied to a source region of the nMOSFET. As a result, a NAND gate is provided. The intermediate potential between the high and the low potential is applied to the source region of the pMOSFET. The low potential is applied to the source region of the nMOSFET. As a result, a NOR gate is provided.
REFERENCES:
patent: 5461250 (1995-10-01), Burghartz et al.
patent: 5801397 (1998-09-01), Cunningham
patent: 6504173 (2003-01-01), Hsu et al.
patent: 2001-051292 (2001-02-01), None
patent: 2002-289697 (2002-10-01), None
Notification of the First Office Action issued by the Chinese Patent Office on Jun. 13, 2008, for Chinese Patent Application No. 200610059431.0, and English-language translation thereof.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Vu Hung
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