Semiconductor logic element and apparatus using thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

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257 9, 257 12, 326 38, 326135, H01L 2906, H01L 29201

Patent

active

060970367

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention relates to a semiconductor logic element and apparatus using the element, and, in particular, relates to a semiconductor logic device that can be comprised of one such logic element. The present invention also relates to equipment such as microprocessors and electronic computers utilizing such logic elements.
2. Description of Related Art
In the conventional art, a microprocessor unit (MPU) is comprised of a plurality of logic gates arranged in combination. Each logic gate is composed, for instance, of a plurality of transistors. For example, when utilizing emitter coupled logic (ECL) circuits to make up logic circuits comprised of NOR gates, one of the most basic logic elements, a circuit as shown in FIG. 24 containing 13 transistors and 16 passive elements (resistors and diodes) is used. Here "Vcc" indicates the power supply voltage terminal, while "a" and "b" are the input terminals. Also in FIG. 24, "a.multidot.b" is the AND output of the input "a" and the input "b", while "a+b" is the NOR output of the inputs "a" and "b", and "a" is the NOT output of "a".
The MPU circuit configuration has an unsystematic arrangement with the many wires making multilayer wiring technology a necessity and further problems such as delay time and stray capacitance in the wiring making sophisticated countermeasures essential. These factors serve to make logic design complicated and interfere with MPU high speed, high performance operation. As graphical user interfaces (GUI) such as utilized in work stations and personal computers become more sophisticated, however, higher speed and more functions are continually being sought for digital circuits in the interface control sections that determine the processing speed not only in the MPU but also in computers, paths and video ports, etc. Abstract One effective approach to resolve such problems is a multifunction element. More specifically, this means using one logic element to comprise one gate to achieve a drastic reduction in the number of elements required for a digital circuit such as an MPU. Giving elements more functions not only gives the individual device higher performance but also improves overall performance of the computer by means of its circuits and MPU, etc. One attempt at such a multifunction device is the resonant tunneling device which utilizes the quantum effect.
However, devices utilizing this quantum effect (resonant tunneling phenomenon) must operate at the temperature where the thermal energy of electrons is sufficiently lower than the separation between the quantum energy levels. This requires a low temperature environment utilizing cooling methods such as liquid helium or liquid nitrogen which are troublesome to provide. In contrast, there are methods usable at room temperature such as real space transition, e.g., see "Applied Physics Letters, Vol. 35, p. 469, 1979" and band-to-band tunneling typified by devices such as CHINT (charge injection transistor) described in "Applied Physics Letters, Vol. 57, No. 17, p. 1787, 1990" and RSTLT (real space transition logic transistor) described in "IEEE trans. on E.D. Vol. 39, No. 10, P. 2189, 1992" and ME-HBT (multi emitter heterojunction bipolar transistor) "Electronics Letters, Vol. 30, No. 5, P. 459, 1994" etc.
FIG. 4 shows the operating principle of a semiconductor device utilizing real space transition. The basic structure is comprised of a channel 10 made from intrinsic GaAs, a barrier layer 30 made from intrinsic AlGaAs, a collector layer 20 made from highly N-doped GaAs, a source electrode 510, a drain (heater) electrode 520, a contact layer 501 made from highly N-doped GaAs, an electron provider layer 502 made from highly N-doped AlGaAs, and a collector electrode 530.
During the element operation, the Vcc (supply voltage) applies a positive bias to the collector electrode 530. The element potential profile is shown in FIG. 5. Due to differences in electron affinity between layers and the applied voltage, the effective thicknes

REFERENCES:
patent: 4999687 (1991-03-01), Luryi et al.
Luryi et al., "Charge Injection Transistors and Logic Circuits", Superlattices and Microstructures, vol. 8, No. 4, Jan. 1, 1990, pp. 395-404.
Mori et al., "A Proposal of a SRAM Using Multi-Emitter RHETs and Growth of Nanostructures for its Development", Extended Abstracts of the 13.sup.th Symposium on Future Electron Devices, Oct. 24-25, 1994, pp. 47-52.
Mastrapasqua, et al., "Multiterminal Light-Emitting Logic Device Electrically Reprogrammable Between OR and NA ND Functions," IEEE Trans. Electon Devices, vol. 40, No. 8, Aug. 1993, pp. 1371-1377.
Tanenbaum, A. S., "Structured Computor Organization," 3rd. ed., 1990, pp. 80-83.

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