Semiconductor logic circuit with a bipolar current mirror arrang

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307451, 307570, 330257, 330288, H03K 1902, H03K 19094

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active

050270095

ABSTRACT:
A semiconductor logic circuit includes a bipolar totem pole buffer. The buffer is made up of a first npn bipolar transistor whose collector-emitter path is connected between a first power source node and an output node, and a second npn bipolar transistor whose collector-emitter path is connected between the output node and a second power source node. A third npn bipolar transistor is connected at the collector and the base to the base of the second npn bipolar transistor, and at the emitter to the second power source node. An output transistor drive circuit includes a MOS transistor. The drain-source path of the MOS transistor is connected between a third power source node, which is placed at one of potentials equal to and lower than the potential of the first power source node, and the base of the second npn bipolar transistor. The gate of the MOS transistor is connected to a signal input node.

REFERENCES:
patent: 4798981 (1989-01-01), Tsugaru et al.
patent: 4810902 (1989-03-01), Storti et al.
patent: 4883988 (1989-11-01), Ide et al.

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