Semiconductor load port alignment device

Geometrical instruments – Gauge – Collocating

Reexamination Certificate

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Details

C033S613000, C033S533000

Reexamination Certificate

active

06789328

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of semiconductor equipment and more particularly to a semiconductor load port alignment device.
BACKGROUND OF THE INVENTION
Semiconductor wafers are moved in and out of cassettes with automated handling devices. These automated tools need to be properly set up to pick up wafers and to properly return wafers to set positions. Leveling of every platform and all automated handling equipment is critical to smooth and cost effective operations.
When automated handlers and platforms are not properly set up, a number of problems can occur. In the most severe cases automated handlers can break wafers. Less severe misalignments can lead to wafer scratching and yield loss. The most common misalignment leads to wafers bumping into the cassette walls and scraping off particles.
One particular problem occurs in the new load ports. As semiconductor wafers have increased in size, the manufactures have developed factories that are completely automated. The wafers are moved about the factory in cassettes called FOUPs (Front Opening Unified Pods). When a FOUP is placed at a station for processing, the cover on the FOUP must be removed. If the cover cannot be removed, the whole process comes to a stand still. Less severe misalignments can lead to the yield losses note above. At present the most common alignment tools and methods for this area are bubble levels and eyeball alignment.
Thus there exists a need for a semiconductor load port alignment device that allows efficient and accurate alignment of FOUPs on load ports and their associated handling equipment.


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