Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2007-06-28
2011-11-22
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S080000, C257S097000, C257SE21125
Reexamination Certificate
active
08063397
ABSTRACT:
Semiconductor light-emitting structures are shown on engineered substrates having a graded composition. The composition of the substrate may be graded to achieve a lattice constant on which a yellow-green light-emitting semiconductor material may be disposed. In some embodiments, the structure may be substantially free of aluminum.
REFERENCES:
patent: 4665415 (1987-05-01), Esaki et al.
patent: 4719155 (1988-01-01), Matsumoto
patent: 4944811 (1990-07-01), Sukegawa et al.
patent: 5202895 (1993-04-01), Nitta et al.
patent: 5221413 (1993-06-01), Brasen et al.
patent: 5374564 (1994-12-01), Bruel
patent: 5442205 (1995-08-01), Brasen et al.
patent: 5534713 (1996-07-01), Ismail et al.
patent: 5638392 (1997-06-01), Ramdani et al.
patent: 5714395 (1998-02-01), Bruel
patent: 5810924 (1998-09-01), Legoues et al.
patent: 5882987 (1999-03-01), Srikrishnan
patent: 6039803 (2000-03-01), Fitzgerald et al.
patent: 6107653 (2000-08-01), Fitzgerald et al.
patent: 6184111 (2001-02-01), Henley et al.
patent: 6219365 (2001-04-01), Mawst et al.
patent: 6291321 (2001-09-01), Fitzgerald
patent: 6335264 (2002-01-01), Henley et al.
patent: 6391740 (2002-05-01), Cheung et al.
patent: 6458723 (2002-10-01), Henley et al.
patent: 6472685 (2002-10-01), Takagi
patent: 6500732 (2002-12-01), Henley et al.
patent: 6503773 (2003-01-01), Fitzgerald
patent: 6518644 (2003-02-01), Fitzgerald
patent: 6548382 (2003-04-01), Henley et al.
patent: 6632724 (2003-10-01), Henley et al.
patent: 6645829 (2003-11-01), Fitzergald
patent: 6677192 (2004-01-01), Fitzgerald
patent: 6682965 (2004-01-01), Noguchi et al.
patent: 6723622 (2004-04-01), Murthy et al.
patent: 6805744 (2004-10-01), Kim et al.
patent: 6852556 (2005-02-01), Yap
patent: 6987286 (2006-01-01), McGill et al.
patent: 2002/0008289 (2002-01-01), Murota et al.
patent: 2002/0011628 (2002-01-01), Takagi
patent: 2002/0105015 (2002-08-01), Kubo et al.
patent: 2002/0140031 (2002-10-01), Rim
patent: 2002/0197803 (2002-12-01), Leitz et al.
patent: 2003/0025131 (2003-02-01), Lee et al.
patent: 2003/0057416 (2003-03-01), Currie et al.
patent: 2003/0218189 (2003-11-01), Christiansen et al.
patent: 2004/0026765 (2004-02-01), Currie et al.
patent: 2004/0074866 (2004-04-01), Fournel et al.
patent: 2004/0087117 (2004-05-01), Leitz et al.
patent: 2004/0121507 (2004-06-01), Bude et al.
patent: 2004/0178406 (2004-09-01), Chu
patent: 2005/0020094 (2005-01-01), Forbes et al.
patent: 2005/0205954 (2005-09-01), King et al.
patent: 2005/0247926 (2005-11-01), Sun et al.
patent: 2005/0250294 (2005-11-01), Ghyselen
patent: 2006/0001088 (2006-01-01), Chan et al.
patent: 2006/0049409 (2006-03-01), Rafferty et al.
patent: 2006/0055800 (2006-03-01), Ackland et al.
patent: 2007/0105335 (2007-05-01), Fitzgerald
patent: 0 683 522 (1995-11-01), None
patent: 2 365 214 (2002-02-01), None
patent: WO 98/59365 (1998-12-01), None
patent: WO 99/53539 (1999-10-01), None
patent: WO 01/00522 (2001-01-01), None
patent: WO 01/99169 (2001-12-01), None
patent: WO 03/103031 (2003-12-01), None
patent: WO 2004/006327 (2004-01-01), None
patent: WO 2004/021420 (2004-03-01), None
Agarwal et al., “Efficient production of silicon-on-insulator films by co-implantation of He+ with H+,”Appl. Phys. Lett., Mar. 2, 1998, pp. 1086-1088, vol. 72, No. 9.
Armstrong et al., “Design of Si/SiGe heterojunction complementary metal-oxide-semiconductor transistors,”IEEE, Electronic Devices Meeting, 1995, pp. 31.1.1-31.1.4.
Aubertine et al. “Observation and modeling of the initial fast interdiffusion regime in Si/SIGe multilayers”,J. Appl. Phys., Nov. 1, 2002, pp. 5027-5035, vol. 92, No. 9.
Bruel, “Silicon on insulator material technology”,Electronics Letters, Jul. 6, 1995, pp. 1201-1202, vol. 31, No. 14.
Cheng et al., “Electron mobility enhancement in strained-Si n-MOSFETs fabricated on SiGe-on-insulator (SGOI) substrates,”IEEE Electronic Device Letters, Jul. 2001, pp. 321-323, vol. 22, No. 7.
Cheng et al., “Relaxed silicon-germanium on insulator (SGOI),”Mater. Res. Soc. Symposium Proc., Nov. 26-28, 2001, pp. A1.5.1-A1.5.6, vol. 686.
Cheng et al., “Relaxed silicon-germanium on insulator substrate by layer transfer,”J. Electronic Materials, Dec. 2001, pp. L37-L39, vol. 30, No. 12.
Cheng et al., “SiGe-on-insulator (SGOI): Substrate preparation and MOSFET fabrication for electron mobility evaluation,”IEEE International SOI Conference, Oct. 1-4, 2001, pp. 13-14.
Corni et al., “Helium-implanted silicon: A study of bubble precursors”,J. Appl. Phys., Feb. 1, 1999, pp. 1401-1408, vol. 85, No. 3.
Corni et al., “Vacancy-gettering in silicon: cavities and helium implantation,”Solid State Phenomema, 1999, pp. 229-234, vol. 69-70.
Currie et al., “Controlling threading dislocation densities in Ge on Si using graded SiGe layers and chemical-mechanical polishing,”Appl. Phys. Lett., Apr. 6, 1998, pp. 1718-1720, vol. 72, No. 14.
Currie, et al., “Carrier mobilities and process stability of strained Si n- and p-MOSFETs on SiGe virtual substrates,”J. Vac. Sci. Technol. B, Nov. 2001, pp. 2268-2279, vol. 19, No. 6, American Vacuum Society.
Fitzgerald et al., “Dislocations in relaxed SiGe/Si heterostructures,”International Conference on Extended Defects in Semiconductors(EDS' 98),J. Phys. Stat. Sol.A, Sep. 6-11, 1998, pp. 227-238, vol. 171, No. 1, Wiley-VCH, Germany.
Fitzgerald et al., “Dislocation dynamics in relaxed graded composition semiconductors,”Materials Science and Engineering, 1999, pp. 53-61, vol. B67.
Fitzgerald et al., “Totally relaxed GexSi1−xlayers with low threading dislocation densities grown on Si substrates,”Appl. Phys. Lett., Aug. 12, 1991, pp. 811-813, vol. 59, No. 7, American Institute of Physics.
Friedman et al., “A proposed electroabsorption modulator at 1.55 μm in silicon/silicon-germanium asymmetric quantum-well structures,”IEEE Phototonics Technology Letters, Oct. 1993, pp. 1200-1202, vol. 5, No. 10.
Fu et al. Quantum mechanical description of p-type Si/Si1−xGexquantum well MOSFET in silicon-on-insulator technology;Solid-State Electronics, 1997, pp. 729-732, vol. 41, No. 5.
Gracias et al., “Experiments on silicon-to-silicon direct Bonding,”XIII Meeting of the Brazilian Vacuum Society, Jul. 1998, pp. 19-22; Campinas, Brazil.
Griglione et al., “Diffusion of Ge in Si1−xGex/Si single quantum wells in inert and oxidizing ambients,”J. Appl. Phys., Aug. 1, 2000, pp. 1366-1371, vol. 88, No. 3.
Griglione et al, “Diffusion of single quantum well Si1−xGex/Si layers under vacancy supersaturation,”J. Appl. Phys., Mar. 1, 2001, pp. 2904-2906, vol. 89, No. 5.
Gupta et al., “Improved hole mobilities and thermal stability in a strained-Si/strained-Si1—yGey/strained-Si heterostructure grown on a relaxed Si1−xGexBuffer,”Appl. Phys. Lett., May 3, 2005, pp. 192104-1-192104-3, vol. 86, No. 19, American Institute of Physics.
Holländer et al., “Interdiffusion and thermally induced strain relaxation in strained Si1−xGex/Si superlattices,”Physical Review B, Sep. 15, 1992, pp. 6975-6981, vol. 46, No. 11.
Johnson, “Mechanism for hydrogen compensation of shallow-acceptor impurities in single-crystal silicon,”Phys. Rev. B, Apr. 15, 1985, pp. 5525-5528, vol. 31, No. 8.
Känel et al., “Very high hole mobilities in modulation-doped Ge quantum wells grown by low-energy plasma enhanced chemical vapor deposition,”Appl. Phys. Lett., Apr. 22, 2002, pp. 2922-2923, vol. 80, No. 16.
Kim et al. “Fabrication of thin film transistors using a Si/Sii−xGex/Si triple layer film on a SiO2substrate,”IEEE Electron Device Letters, May 1996, pp. 205 207, vol. 17, No. 5.
Langdo et al., “SiGe-Free strained Si on insulator by wafer bonding and layer transfer,”App. Phys. Lett., Jun. 16, 2003, pp. 4256-4258, vol. 82, No. 24, American Institute of Physics, Melville, NY, US.
Lauer
Fitzgerald Eugene A.
Mori Michael J.
Fahmy Wael
Ingham John C
Massachusetts Institute of Technology
Wolf Greenfield & Sacks P.C.
LandOfFree
Semiconductor light-emitting structure and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor light-emitting structure and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor light-emitting structure and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4284089