Semiconductor leadframe for staggered board attach

Details Semiconductor leadframe for staggered board attach Semiconductor leadframe for staggered board attach

2006-02-21

2006-02-21

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S667000, C257S670000

Reexamination Certificate

active

07002240

ABSTRACT:
The semiconductor integrated circuit device comprises a planar leadframe having lead segments arranged in alternating order into first and second pluralities, the segments having their inner tips near the chip mount pad and their outer tips remote from the mount pad. The outer tips have a solderable surface. All outer tips are bent away from the leadframe plane into the direction towards the intended attachment locations on an outside substrate such that the first segment plurality forms an angle of about 70±1° from the plane and the second segment plurality forms an angle of about 75±1° (see FIG.4). Consequently, the outer tips create a staggered lead pattern suitable for solder attachment to an outside substrate.

REFERENCES:
patent: 5098863 (1992-03-01), Dolezal et al.
patent: 5271148 (1993-12-01), Desrochers et al.
patent: 5557143 (1996-09-01), Seiji
patent: 5753532 (1998-05-01), Sim
patent: 5877542 (1999-03-01), Ohuchi
patent: 6258630 (2001-07-01), Kawahara
patent: 0 432 825 (1990-11-01), None
patent: 404170057 (1990-11-01), None

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