Semiconductor interconnect formed over an insulation and...

Details Semiconductor interconnect formed over an insulation and... Semiconductor interconnect formed over an insulation and...

1999-09-01

2001-05-15

Abraham, Fetsum (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S758000, C257S759000, C257S760000, C257S761000, C257S762000, C257S763000, C257S764000, C257S765000, C257S915000

Reexamination Certificate

active

06232656

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a metal wire layer and a passivation film in the uppermost layer and a method of manufacturing the semiconductor device. More particularly, it relates to improvement in the structures of a bonding pad and a surface protecting film.
In accordance with recent refinement of a semiconductor device, there are increasing demands for a semiconductor device having a multilayer wiring structure for increasing a density of each chip and increasing an operation speed. Now, an example of a conventional semiconductor device having the multilayer wiring structure will be described.
FIG. 18
is a sectional view for illustrating the structure in the vicinity of the uppermost wires of the conventional semiconductor device. In
FIG. 18
, a semiconductor substrate and elements such as a transistor disposed thereon are omitted. Also, a semiconductor substrate generally bears interlayer insulating films and metal wires in several layers, but these elements are also omitted in
FIG. 18
, so as to show merely uppermost metal wires
12
, an interlayer insulating film
11
formed under the metal wires
12
and elements formed on them.
As is shown in
FIG. 18
, on the underlying interlayer insulating film
11
are formed the uppermost metal wires
12
by stacking a Ti film and the like, and a surface protecting film
21
is formed so as to cover the underlying interlayer insulating film
11
and the metal wires
12
. In this case, the surface protecting film
21
is a multilayer film including an underlaying insulating film
19
of a thin silicon film and a passivation film
14
of a silicon nitride film. Furthermore, a bonding pad
15
formed out of the same metal film as the metal wires
12
is provided. The surface protecting film
21
is provided with an opening
21
a
of several tens &mgr;m square, so that external electrical connection can be generally attained through the bonding pad
15
exposed within the opening
21
a.
FIGS.
19
(
a
) and
19
(
b
) are sectional views for showing manufacturing procedures for the conventional semiconductor device. First, as is shown in FIG.
19
(
a
), the metal wires
12
and the bonding pad
15
are formed on the underlaying interlayer insulating film
11
. Then, as is shown in FIG.
19
(
b
), the underlying insulating film
19
and the passivation film
14
are successively deposited on the interlayer insulating film
11
and the metal wires
12
. Thereafter, the underlying insulating film
19
and the passivation film
14
are patterned, so as to form the opening
21
a
as is shown in FIG.
18
. Thus, the structure of the semiconductor device as shown in
FIG. 18
can be obtained.
Such a conventional structure of the semiconductor device has, however, the following problems: The silicon nitride film for forming the passivation film
14
in the uppermost layer is required to be deposited under conditions of a temperature lower than the melting point of the metal film. Therefore, it is necessary to adopt CVD in plasma atmosphere or the like, which is poor in the step coverage, and hence, it is difficult to attain a good burying characteristic in an area with a small pitch between the wires. As a result, a coverage defect is caused particularly in a concave step portion as is shown in FIG.
20
(
a
), and hence, a defect in reliability due to moisture absorption can be disadvantageously easily caused. On the other hand, another problem occurs when merely the passivation film
14
of the silicon nitride film with a large dielectric constant is formed on the substrate without forming the underlying insulating film so as to improve the moisture absorption resistance as is shown in FIG.
20
(
b
). In this case, in accordance with the refinement of elements, an insulating film with a large dielectric constant is filled in the area between the metal wires with a small pitch. Therefore, a parasitic capacity between the wires is increased in the uppermost layer, resulting in disadvantageously increasing a wiring delay.
In addition, as is shown in
FIG. 21
, moisture absorption through the underlying insulating film
19
exposed within the opening
21
a
on the bonding pad
15
can cause a similar problem.
Such a problem owing to the moisture absorption can be more and more serious in a semiconductor device of the next generation, in which a silicon oxide film doped with fluorine and an organic SOG film having a small dielectric constant and high moisture absorption resistance are to be introduced in stead of the silicon nitride film as the passivation film so as to suppress the increase of a parasitic capacitance.
SUMMARY OF THE INVENTION
The present invention was devised in view of the aforementioned conventional problems. The object is providing a semiconductor device having high integration, high reliability and high performance and a method of manufacturing the semiconductor device, by decreasing a parasitic capacitance between metal wires with a small pitch in a metal wire layer, by preventing a coverage defect in depositing a silicon nitride film used as a passivation film, and by suppressing moisture absorption through an opening for forming a bonding pad.
The semiconductor device of this invention comprises a semiconductor substrate bearing semiconductor elements; an interlayer insulating film formed on the semiconductor substrate; a metal wire layer including plural metal wires formed on the interlayer insulating film; a surface protecting film including a first dielectric film with a small dielectric constant for filling at least a part of areas among the metal wires in the metal wire layer and a second dielectric film with a higher moisture absorption preventing function than the first dielectric film for covering the metal wire layer and the first dielectric film; an opening for a bonding pad formed in the surface protecting film; and a bonding pad formed in the opening for obtaining external electrical connection, wherein the bonding pad and the second dielectric film of the surface protecting film completely cover the first dielectric film within the opening so as not to expose the first dielectric film.
Owing to this structure, the following effects can be attained: Since the area between the metal wires of the metal wire layer is filled with the first dielectric film with a small dielectric constant, the parasitic capacitance of the metal wires can be decreased. Furthermore, since the first dielectric film within the opening is covered with the bonding pad and the second dielectric film so as not to expose the first dielectric film, the moisture absorption through the opening can be prevented.
The first dielectric film preferably is buried, among the areas among the metal wires, at least in an area having a minimum pitch between the metal wires.
Thus, the area with a small pitch in the metal wire layer can be filled with the first dielectric film with a small dielectric constant, and hence, the parasitic capacitance of the metal wires can be decreased. Moreover, since the first dielectric film with a small dielectric constant has good coverage, a coverage defect in the area with a small pitch in the metal wire layer can be avoided.
In one aspect, the first dielectric film can be formed on the interlayer insulating film and the metal wires, and the second dielectric film can be formed over the first dielectric film; the opening can be formed through the first and second dielectric films, with exposing a part of at least one of the metal wires of the metal wire layer; and the bonding pad can be buried in the opening so as to cover a side face of the first dielectric film within the opening and can be connected with the at least one of the metal wires.
In another aspect, the bonding pad can extend above a top surface of the second dielectric film.
Also in these aspects, the aforementioned effects can be exhibited.
In one aspect, the bonding pad can have an area larger than a connecting portion with the at least one of the metal wires, and can extend above a top sur

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