Semiconductor integrated logic circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays

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257204, 257206, 257369, 257401, H01L 2710

Patent

active

059862920

ABSTRACT:
An inverter-type basic cell, with a hexagonal contour, comprises one CMOS device pair arrangement including an n-channel transistor and a p-channel transistor. The inverter-type basic cell has a gate region annularly formed and connected in parallel with the n-channel and p-channel transistors, a sectoral drain diffusion region having a vertex at the center of the annularly-formed gate region, and a source diffusion region that is formed outside of the gate region in such a way as to define a shape having two opposing sides that lie on the prolongation of the two radii of the sectoral drain diffusion region.

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