Semiconductor integrated driving circuit including C-MOS and jun

Details Semiconductor integrated driving circuit including C-MOS and jun Semiconductor integrated driving circuit including C-MOS and jun

1978-05-04

1981-01-20

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307251, 307304, 368 87, 368219, H03K 3353, H03K 7687, G04C 908

Patent

active

042464986

ABSTRACT:
A semiconductor integrated driving circuit including a junction FET and a C-MOS FET fabricated on a common semiconductor substrate. The junction FET is switched between conductive and non-conductive states for controlling and supplying a high driving current to a high current load element.

REFERENCES:
patent: 3591855 (1971-07-01), Dean
patent: 3742698 (1973-07-01), Naito
patent: 3937003 (1976-02-01), Busch et al.
patent: 4028556 (1977-06-01), Cachier et al.
patent: 4032864 (1977-06-01), Yamashiro et al.
patent: 4086500 (1978-04-01), Suzuki et al.
patent: 4093925 (1978-06-01), Yokoyama
patent: 4112671 (1978-09-01), Kato
patent: 4142111 (1979-02-01), McElroy
Amelco Semiconductor-Theory and Application Notes, No. 2, (pub.) 6/1962, pp. 1-7, "FET Characteristics and Circuit Design".
Ott, "Biasing The Junction FET", EEE (pub.), 1/1970, pp. 52-57.

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