1977-09-13
1980-02-05
Edlow, Martin H.
357 49, 357 55, H01L 2904
Patent
active
041875168
ABSTRACT:
A semiconductor integrated circuit which is reduced in size by having active and/or passive elements in an epitaxial layer having a [100] crystallographic surface, and having anisotropically etched regions with sloped [111] crystallographic surface walls which isolate adjacent semiconductor elements and/or regions of semiconductor material beneath said elements. Conductors interconnecting said elements are supported on the [100] and [111] crystallographic surfaces and contact said elements and/or said high conductivity regions through apertures in surface passivating protective coatings on said surfaces.
REFERENCES:
patent: 3316130 (1967-03-01), Dash et al.
patent: 3493820 (1970-02-01), Rosvold
patent: 3818289 (1974-06-01), Mudge et al.
Legat Wilhelm H.
Taft Keith G.
Tiefert Karl H.
Edlow Martin H.
Pannone Joseph D.
Raytheon Company
Sharkansky Richard M.
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