Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1996-07-15
2001-01-23
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S543000
Reexamination Certificate
active
06177831
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit which allows the adjustment of the operating speed of a circuit or a semiconductor device constituting the circuit and the adjustment of the consumption of electricity, wherein the circuit includes one or more circuits, such as MOSIC (Metal Oxide Semiconductor Integrated Circuit).
2. Description of Related Art
FIGS. 1A and 1B
is a circuit diagram of a known inverter using a P-channel MOS transistor and an N-channel MOS transistor both in which a well potential (or substrate potential) is predetermined. The reference numerals T
11
and T
13
designate the P-channel MOS transistors and the reference numerals T
12
and T
14
designate the N-channel MOS transistors, respectively. There are two sets of series connected transistors: T
11
with T
12
and T
13
with T
14
. T
11
and T
13
connected in series T
12
and T
14
are connection in series, and the junctions therebetween is connected to an output terminal Out.
The source of the P-channel MOS transistor T
11
is delivered with a source voltage Vcc, and the source of the N-channel MOS transistor T
12
is grounded, and the gate of each transistor T
11
aid T
12
is connected to a voltage source of signals (not shown) in FIG.
1
A.
The N-well of the P-channel MOS transistor T
11
shown in FIG.
1
A is delivered with a source voltage Vcc as the source thereof is, and the P-well of the N-channel MOS transistor T
12
is at the ground potential as the source thereof is. These potentials are predetermined.
The N-well of the P-channel MOS transistor T
13
and the P-channel of the N-channel MOS transistor T
14
shown in
FIG. 1B
are also at a predetermined potential.
There is also known a MOSIC designed to change a threshold voltage of a transistor in accordance with the operating conditions of the circuit which is disclosed in “ISSCC 95, Feb. 17, 1995, p. 318-319/FP19.4 (50% Active Power Saving without Speed Degradation Using Standby Power Reduction (SPR) Circuit)”.
In this MOSIC the well potential is selectively switched over between two bits depending upon the circuit being in operation or not in operation.
In general, when the potential of a well or substrate is predetermined in a transistor constituting the MOSIC, the threshold voltage of the transistor is automatically fixed, thereby leaving no room for controlling the operating speed of the circuit or transistor and the consumption of electricity.
In the case of an expedient for varying the well potential by two stages, it is difficult to effect the subtle control of the operating speed and consumption of electricity.
There are MOSICs which include a circuit capable of predetermining an operating frequency as desired or a circuit operable at a plurality of source voltages. In neither case the well potential or substrate potential can be varied in accordance with the operating frequency or source voltage. As a result, the following problems arise:
In the former case, a variation in the operating frequency changes a time required for completing a predetermined operation of the circuit; for example, when a circuit in the MOSIC is operated at a high frequency, the transistor constituting the circuit is required to operate at a high speed, whereas if it is operated at a low frequency, the transistor may be operated at a low speed. When the circuit is designed to operate at a high frequency, the transistor must be unnecessarily operated at a high speed.
In the latter case, when the circuit is used at a high source voltage, the transistor is operated at a high speed, and the consumption of electricity becomes large. In contrast, when the circuit is used at a low source voltage, the consumption of electricity is reduced but the disadvantage is that the operating speed of the transistor becomes low.
SUMMARY OF THE INVENTION
The present invention has been made to solve the problems mentioned above, and an object of the present invention is to provide a semiconductor integrated circuit capable of effecting the subtle control of the operating speed of a transistor and reducing the consumption of electricity by controlling the potential of a well or substrate.
The semiconductor integrated circuit of a first invention comprises at least one circuit including a well/substrate, and a potential control circuit for changing the potential of the well/substrate, thereby controlling the well/substrate potential.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential with changing thereof continuously or separately.
The semiconductor integrated circuit of a second invention comprises, according to the first invention, the potential control circuit which receives a predetermined frequency and controls the well/substrate potential in accordance with the applied frequency.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential in accordance with the operating frequency.
The semiconductor integrated circuit of a third invention comprises, according to the first invention, the potential control circuit which receives a signal multiplication rate outputted from a PLL circuit and controls the well/substrate potential in accordance with the applied signal multiplication rate.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential in accordance with the applied signal multiplication rate.
The semiconductor integrated circuit of a fourth invention comprises, according to the first invention, the potential control circuit which receives a predetermined source voltage, and controls the well/substrate potential in accordance with the applied source voltage.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential in accordance with a variable source voltage.
The semiconductor integrated circuit of a fifth invention additionally comprises, according to the first invention, an identification circuit for identifying the operating conditions of the circuit, and wherein the potential control circuit controls the well/substrate in accordance with an identification signal from the identification circuit.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential in accordance with an identification signal from the identification circuit.
The semiconductor integrated circuit of a sixth invention additionally comprises, according to the first invention, an input terminal for receiving an external signal, and wherein the potential control circuit controls the well/substrate potential in accordance with a voltage applied to the input terminal.
As a result, the operating speed of the circuit or semiconductor devices and the consumption of electricity can be subtly adjusted by controlling the well potential or substrate potential in accordance with a voltage applied to the input terminal.
The semiconductor integrated circuit of a seventh invention comprises, according to the first invention, the potential control circuit which includes an output terminal for controlling a well/substrate potential in an external MOSIC.
As a result, the potential control circuit can control the potential of a well or substrate in an external MOSIC, thereby ensuring that the operating speed of the circuits or semiconductor devices in a wide range and the consumption of electricity can be subtly adjusted.
The above and further objects and features of the invention will more fully be apparent from the following detailed description with the accompanying drawings.
REFERENCES:
pa
Watanabe Tetsuya
Yoneda Hirokazu
Burns Doane , Swecker, Mathis LLP
Callahan Timothy P.
Englund Terry L.
Mitsubishi Denki & Kabushiki Kaisha
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