Semiconductor integrated circuit with test mode

Multiplex communications – Diagnostic testing – Determination of communication parameters

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

07948912

ABSTRACT:
A semiconductor integrated circuit is provided which includes: A signal input terminals which include control input pads, A being an integer greater than or equal to 2; an internal circuit; a clock signal input terminal to which a clock signal is input; and an input signal control block which, in a test mode, separates time-division multiplexed data having a multiplicity of X, the time-division multiplexed data being input from A/X signal input terminals among the A signal input terminals, into individual data in accordance with the clock signal, and outputs the separated individual data to the internal circuit, X being an integer greater than or equal to 2.

REFERENCES:
patent: 3636524 (1972-01-01), Holland
patent: 2003/0097656 (2003-05-01), Tsubouchi
patent: 11-306796 (1999-11-01), None

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