Semiconductor integrated circuit with self-testing

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371 221, G01R 3128

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049107356

ABSTRACT:
A semiconductor integrated circuit comprises a plurality of integrated circuit blocks constructed on a wafer. The integrated circuit blocks are electrically connected to each other so as to form a system. Each of the integrated circuit blocks comprises a logic circuit for carrying out a logic operation, a pseudo-random pattern generating circuit for generating a pseudo-random pattern signal, a switching circuit for selecting either an input signal to be processed by the logic circuit or the pseudo-random pattern signal and a data compressing circuit for compressing an output data signal of the logic circuit. The switching circuit is responsive to a test enabling signal which is independently applied to each integrated circuit block so that each integrated circuit block is independently set to either a test mode or a normal mode, and outputs the selected signal to the logic circuit.

REFERENCES:
patent: 4598401 (1986-07-01), Whelan
patent: 4670877 (1987-06-01), Nishibe
patent: 4682329 (1987-07-01), Kluth et al.
patent: 4701921 (1987-10-01), Powell et al.
patent: 4710930 (1987-12-01), Hatayama et al.
patent: 4764926 (1988-08-01), Knight et al.
Richard O. Carlson, et al, "Future Trends in Wafer Scale Integration", Proceedings of the IEEE, vol. 74, No. 12, pp. 1741-1751, 1986.
E. J. McCluskey, "Testing Semi-Custom Logic", Semiconductor International, pp. 118-123, Sep., 1985.

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