Semiconductor integrated circuit with decreased burn-in time

Details Semiconductor integrated circuit with decreased burn-in time Semiconductor integrated circuit with decreased burn-in time

1987-07-06

1989-02-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307362, 307584, 323311, H03K 17687

Patent

active

048067881

ABSTRACT:
A semiconductor integrated circuit is provided with an internal voltage generator to normally operate with internal source voltage which is lower than externally supplied source voltage and serves as operating source voltage. The semiconductor integrated circuit is further provided with a control circuit for controlling an internal source voltage generator so that voltage generated by the internal source voltage generator in burn-in or the like serves as first voltage which is higher than normal internal source voltage to accelerate the burn-in.

REFERENCES:
patent: 4135125 (1979-01-01), Oura
patent: 4300061 (1981-11-01), Mihalich et al.
patent: 4473762 (1984-09-01), Iwahashi et al.
patent: 4585955 (1986-04-01), Uchida
patent: 4683382 (1987-07-01), Sakurai et al.
patent: 4692689 (1987-09-01), Takemae
IEEE ISSCC, 1986, Digest of Technical Papers, "An Experimental 4Mb CMOS DRAM" by Tohru Furuyama et al., pp. 272-273.

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