Semiconductor integrated circuit with a programmable logic array

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307448, 307303, 357 41, 357 45, H03K 19094

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047453079

ABSTRACT:
A programmable logic array has a plurality of column units aligned parallel to each other. Each column unit consists of at least one MOSFET column, and at least one load element aligned vertically. Each MOSFET column has a plurality of MOSFETs aligned vertically. The MOSFETs have at least one common gate electrode. The MOSFETs belonging to two parallel MOSFET columns have a common linear source electrode.

REFERENCES:
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patent: 4513307 (1985-04-01), Brown
patent: 4644187 (1987-02-01), Haji
patent: 4651190 (1987-03-01), Suzuki et al.
Balasubramanian et al., "Program Logic Array With Metal Level Personalization", IBM T.D.B., vol. 19, No. 6, Nov. 1976, pp. 2144-2145.
Bansal, "Multifunction Circuit Cell", IBM T.D.B., vol. 25, No. 9, Feb. 1983, pp. 4499-4502.
Greenspan et al., "Merged AND/OR Array PLA Using Double Polysilicon FET Process", IBM T.D.B., vol. 23, No. 6, Nov. 1980, pp. 2189-2191.
Kraft et al., "Method of Personalizing Programmed Logic Arrays Using Multiple Levels of Polysilicon", IBM T.D.B., vol. 23, No. 3, Aug. 1980, pp. 881-882.

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