Semiconductor integrated circuit which can be tested by an LSI t

Details Semiconductor integrated circuit which can be tested by an LSI t Semiconductor integrated circuit which can be tested by an LSI t

1995-08-28

1997-12-23

Beausoliel, Jr., Robert W.

Excavating

371 223, G01R 3128

Patent

active

057013063

ABSTRACT:
An LSI (10) to be tested includes a high speed interface (50), a FIFO buffer (16) for temporarily storing data supplied from a high speed interface (50) to an internal circuit (11) of the LSI (10), a selector (24) outputting a selected one of an output of the internal circuit (11) and an output of the FIFO buffer (16) to the high speed interface (50), and a sequencer (17) responding to a test signal (TEST) to control the selector (24) so that the data supplied from the high speed interface (50) to the internal circuit (11) is looped back through the FIFO buffer (16) and the selector (24) to the high speed interface (50). Thus, the LSI (10) including a high speed interface (50) can be tested by use of a high speed LSI tester having a number of pins smaller than the number of all the function terminals of the LSI to be tested.

REFERENCES:
patent: 4887267 (1989-12-01), Kanuma
patent: 4970410 (1990-11-01), Matsushita et al.
patent: 5132614 (1992-07-01), Sakumoto et al.
patent: 5331571 (1994-07-01), Aronoff et al.
patent: 5341096 (1994-08-01), Yamamura
patent: 5341380 (1994-08-01), Shoda
patent: 5404056 (1995-04-01), Maeda
patent: 5465257 (1995-11-01), Yamahata et al.

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