Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals
Patent
1998-07-02
2000-08-08
Cunningham, Terry D.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific input to output function
Combining of plural signals
G06F 744, G06G 716
Patent
active
061007412
ABSTRACT:
For raising the accuracy of analog multiplication, a gate-drain (G-D) connection point of transistor (Tr) whose gate-drain (G-D) are shorted and whose source is connected to ground potential is connected to a source of second Tr whose G-D are shorted, a first input signal current source is connected to a G-D connection point of the second Tr, a G-D connection point of third Tr whose G-D are shorted and whose source is connected to the ground potential is connected to a source of fourth Tr whose G-D are shorted, a second input signal current source is connected to a G-D connection point of the fourth Tr, the G-D connection points of the second and fourth Tr's are connected to first and second capacitors respectively, outputs of the first and second capacitors are connected to each other and to a gate of fifth Tr to form a floating point, a source of the fifth Tr is connected to the ground potential, and a drain current of the fifth Tr is an operation output.
REFERENCES:
patent: 5391947 (1995-02-01), Groves, Jr. et al.
patent: 5541444 (1996-07-01), Ohmi et al.
patent: 5600270 (1997-02-01), Shou et al.
patent: 5835045 (1998-11-01), Ogawa et al.
patent: 5939925 (1999-08-01), Shibata et al.
B. Gilbert, "A Precise Four-Quadrant Multiplier with Subnano Second Response", IEEE J. Solid-State Circuits, Dec. 1993, vol. SC-3, pp. 365-373.
J. Babanezhad, et al., "A 20-V Four Quadrant CMOS Analog Multiplier", Dec. 1985, IEEE Solid-State Circuits, vol. SC-20, pp. 1158-1168.
H. J. Song, et al., "An MOS Four-Quadrant Analog Multiplier Using Simple Two-Input Squaring Circuits with Source Followers," Jun. 1990, IEEE J. Solid-State Circuit, vol. 25 pp. 841-847.
A. Andreou, et al, "Current Mode Subthreshold MOS Ciruits for Analog VLSI Neural Systems," Mar. 1991, IEEE Trans. Neural Networks, vol. 2, No. 2, pp. 205-213.
Ogawa Katsuhisa
Ohmi Tadahiro
Shibata Tadashi
Canon Kabushiki Kaisha
Cunningham Terry D.
Tra Quan
LandOfFree
Semiconductor integrated circuit utilizing insulated gate type t does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit utilizing insulated gate type t, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit utilizing insulated gate type t will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1153792