Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-02-20
2004-08-17
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S685000, C257S723000, C257S777000
Reexamination Certificate
active
06777795
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a package enclosing a semiconductor integrated circuit or a semiconductor chip and to a power supply module that supplies power to the package, and more particularly to a semiconductor integrated circuit module comprising a power supply module provided in the direction perpendicular to the surface of the package and in the vicinity thereof.
2. Description of the Related Art
Recent remarkable progress in the field of semiconductor integrated circuits (LSI) created a demand for LSI chips of decreased size and increased degree of integration, which led to miniaturization of the LSI manufacturing process. Accordingly, a power supply voltage supplied to LSI chips has been lowered from the conventional 5 V to 3.3 V and 2.5 V, and recently LSI or IC have been marketed which operated at a voltage of no more than 1.5 V.
The advantage of decreasing the power supply voltage provided to LSI is that the power consumption of LSI can be decreased. However, the following problem was created by such a decrease. Thus, power supply variations that presented no problem in the convention technology adversely affect the operation of LSI chips. In order to resolve this problem, Japanese Patent Applications Laid-open Nos. H11-177015 and 2001-68583 suggested a technology of mounting electronic components such as bypass capacitors on the upper surface of semiconductor package or in the vicinity thereof.
Furthermore, as the power supply voltage has been decreasing from that of the conventional 5 V single power sources, a plurality of power supply voltages have become necessary for a single LSI package and because the required power supply voltage differs depending on LSI or IC, it was necessary to mount a plurality of power sources on a substrate (printed wired board, printed circuit board) having a plurality of LSI packages mounted thereon.
With the technology described in Japanese Patent Applications Laid-open Nos. 11-177015 and 2001-68583, the effect of power supply variations can be decreased by shortening the distance between the bypass capacitor and LSI chip. However, the power supply distance between the power source and LSI chip serving as a load therefor cannot be shortened. For this reason, following such a transition to a decreased power supply voltage, an electromagnetic noise can be easily generated from the power supply lines and the components can be easily affected by an external electromagnetic noise.
Moreover, in the substrates requiring a plurality of power supply voltages, not only they were easily mutually affected by the noise, but the mounting efficiency of the substrates was also poor.
SUMMARY OF THE INVENTION
A power supply module is mounted on a package enclosing or sealing a semiconductor integrated circuit (IC, LSI), in the direction perpendicular to the surface of the package. The pin arrangement of the power supply module is standardized. The package and the power supply module disposed in the vicinity thereof are handled as a semiconductor integrated circuit module. A signal such as an input/output voltage of the power supply module is input in a voltage variation detection circuit unit provided inside a chip such as LSI.
As a result, the power supply distance between the power supply module and a chip, such as LSI, serving as a load therefor can be shortened. Therefore, the radiation of power source noise can be reduced. Moreover, since shortening of the power supply distance decreases the resistance and inductance of the power supply line, the efficiency of the power supply unit of the power supply module is increased, the variations of the power supply voltage are reduced, and a high-speed response is made possible.
Moreover, in a substrate comprising a plurality of LSI packages, power supply modules required for each package can be mounted on individual packages. Therefore, they can be handled as semiconductor integrated circuit modules. As a result, the number of power source types (voltage types) required for the substrate can be decreased and the mounting efficiency of the substrate is improved. Furthermore, even with the power source of one type, since the power supply module can be mounted on the upper surface of an LSI package, the mounting efficiency of the substrate is increased.
REFERENCES:
patent: 6184580 (2001-02-01), Lin
patent: 6394175 (2002-05-01), Chen et al.
patent: 6432750 (2002-08-01), Jeon et al.
patent: 8-279593 (1996-10-01), None
patent: 11-177015 (1999-07-01), None
patent: 2000-349228 (2000-12-01), None
patent: 2001-68583 (2001-06-01), None
Abe Seiichi
Sasakura Takahiro
Antonelli Terry Stout & Kraus LLP
Fahmy Wael
Hitachi , Ltd.
Nguyen DiLinh
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