Semiconductor integrated circuit memory

Details Semiconductor integrated circuit memory Semiconductor integrated circuit memory

1997-08-11

2000-02-08

Phan, Trong

Static information storage and retrieval

Addressing

Sync/clocking

36518905, 36523008, G11C 800, G11C 1604

Patent

active

060234423

ABSTRACT:
In an output data latch for a semiconductor integrated circuit memory receiving at least one or more kinds of control clocks from an external, source an output data latch control clock generating circuit is provided, which uses, as a trigger for canceling the latched condition of the output data latch, a rising edge having a high time precision, of the output latch control clock for a corresponding cycle of an effective data output, and as a trigger for starting the data latching, a rising edge having a high time precision, of the input signal fetching control clock for a cycle next to the corresponding cycle of the effective data output. It becomes possible to generate the output data latch control clock having a high time precision.

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patent: 5694371 (1997-12-01), Kawaguchi
patent: 5726950 (1998-03-01), Okamoto et al.
patent: 5748553 (1998-05-01), Kitamura
patent: 5793665 (1998-08-01), Kim et al.
patent: 5805506 (1998-09-01), Matsui
patent: 5838630 (1998-11-01), Okajima et al.

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