Semiconductor integrated circuit interconnection structures and

Details Semiconductor integrated circuit interconnection structures and Semiconductor integrated circuit interconnection structures and

1997-10-28

2000-10-10

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

With means to prevent contact from penetrating shallow pn...

257748, 257750, 257753, 257758, 257763, 257764, 257765, 257766, 257771, 257774, 257908, 257915, 257767, H01L 2348, H01L 2352, H01L 2940

Patent

active

061304816

ABSTRACT:
A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in the first electrically conducting interconnection layer proximate the through-hole extending to the first electrically insulating layer and filled with part of the second electrically insulating layer, constraining current flowing between the first and second electrically conducting interconnection layers to flow around the current barrier.
A method of making a semiconductor integrated circuit interconnection structure includes forming an active electronic element in a semiconductor substrate; forming a first electrically insulating layer on the electronic element and the semiconductor substrate; forming a first electrically conducting interconnection layer electrically connected to the electronic element, at least partially disposed on the first electrically insulating layer, and including at least one opening extending to the first electrically insulating layer; forming a second electrically insulating layer on the first electrically conducting interconnection layer and filling the opening, thereby forming a barrier to the flow of current in a region of the first electrically conducting interconnection layer; forming a throughhole extending through the second electrically insulating layer to the first electrically conducting interconnection layer proximate the opening; and depositing a second electrically conducting interconnection layer on the second electrically insulating layer and in the through-hole, electrically contacting the first electrically conducting interconnection layer.

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patent: 5712509 (1998-01-01), Harada et al.
Tomioka et al., "A New Reliability Problem Associated With Ar Ion Sputter Cleaning of Interconnect Vias", IEEE IRPS, pp. 53-58.
Nishida et al., "Multilevel Interconnection For Half-Micron ULSI's", IEEE, VMIC Conference, Jun. 1989, Jun. 1989, pp. 19-25.
Abe et al., "High Performance Multilevel Interconnection System With Stacked Interlayer Dielectrics By Plasma CVD And Bias Sputtering", IEEE, VMIC Conference, Jun. 1989, pp. 404-410.

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