Semiconductor integrated circuit including voltage follower...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S056000, C327S323000

Reexamination Certificate

active

06294941

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to a voltage follower circuit and a semiconductor integrated circuit including the voltage follower circuit, and more particularly to a voltage follower circuit having a source follower output transistor and a clamp circuit for limiting a gate-source voltage of the source follower output transistor.
BACKGROUND OF THE INVENTION
Conventionally, there is known a voltage follower circuit having a structure in which an output of a source follower output transistor is fed back to the gate electrode of the source follower output transistor via a differential amplifier. An example of such voltage follower circuit is shown in FIG.
5
. From
FIG. 5
, it can be seen that an output n-channel type MOS transistor
26
, a resister
9
and a resistor
10
are serially connected between a high potential power supply voltage line
51
and the ground line
52
, and thereby a source follower output, stage is constituted. Here, the voltage of the high potential power supply voltage line is designated as Vbatt. The source electrode and the backgate electrode of the transistor
26
are mutually coupled, and a source potential voltage is applied to the backgate electrode. The circuit further comprises a differential amplifier
1
which receives a reference voltage Vref supplied from an external source at a non-inverting input thereof. A potential voltage at the connection point between the resistor
9
and the resistor
10
of the source follower output stage is returned to an inverting input of the differential amplifier
1
, and the output point of the differential amplifier
1
, that is, node A, is coupled to the gate electrode of the source follower output transistor
26
. That is, this circuit constitutes a voltage follower structure by using a negative feedback of a divided voltage of an output voltage Vout as a gate input of the output transistor, via the differential amplifier.
The voltage follower circuit shown in
FIG. 5
has a disadvantage in that, when the power supply voltage Vbatt is a high voltage, the area occupied by the circuit becomes large. The reasons for this disadvantage will be described below.
When a LSI including the voltage follower circuit shown in
FIG. 5
is used, for example, as an IC for mobile use, the power supply voltage Vbatt is higher than a voltage used for a usual LSI, for example, 5V or 3.3V, and becomes a voltage of approximately between 7 through 40V. What voltage is used as the power supply voltage Vbatt is determined depending on the type of a car, for example, depending on whether a car using the LSI is a passenger car or a truck, and so on. Therefore, the power supply voltage of the LSI for mobile use is selected to be the highest voltage, i.e., 40V in the above-mentioned voltage range between 7V and 40V. This is because, in order to cope with various types of cars by using one type of LSI, it is necessary to guarantee that the LSI can safely function even in the highest power supply voltage.
In
FIG. 5
, an output voltage range of the amplifier
1
is approximately from the power supply voltage Vbatt (=40V, in case of this example) to the ground potential level. Therefore, depending on the value of the output voltage Vout, for example, when the output terminal
53
is instantaneously short-circuited with the ground, when the output voltage Vout is not yet settled just after the power supply voltage is turned on, and so on, there is a possibility that a voltage which is maximally equal to the power supply voltage Vbatt is applied between the gate electrode and source and backgate electrodes of the source follower transistor
8
. To this end, in the circuit of
FIG. 5
, all the MOS transistors used in the LSI must be high withstanding voltage transistors. Thus, a gate oxide film of each MOS transistor must be thick and also, at the same time, channel length must be long. Consequently, current drive ability of the MOS transistor, shown in the expression below, is deteriorated. In order to guarantee a large current drive ability of the transistor, channel width of the transistor must be made large, and when the LSI is required to have high withstanding voltage and especially large output current, the area occupied by the voltage follower circuit becomes very large.
Id
=(1/2)*(
W/L
)&mgr;
0
(∈
ox
/t
ox
)*(
Vgs−Vt
)
2
(Where, Id: drain current, W: channel width, L: channel length, &mgr;
0
: mobility of carrier, ∈
ox
: dielectric constant of oxide film, t
ox
: thickness of gate oxide film, Vgs: gate voltage, Vt: threshold voltage of MOS transistor).
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to obviate the disadvantages of the conventional voltage follower circuit and of the semiconductor integrated circuit having the voltage follower circuit.
It is another object of the present invention to make it possible to use, as a source follower transistor, a MOS transistor which has thin gate oxide film, which has short channel length and which has high current drive ability, even when a power supply voltage is high, thereby reducing the size of the source follower transistor and thus an area occupied by the transistor, and lowering a cost of a semiconductor integrated circuit including the source follower transistor.
It is still another object of the present invention to provide a voltage follower circuit and a semiconductor integrated circuit having a voltage follower circuit, wherein the voltage follower circuit comprises a source follower transistor and a clamp circuit for limiting a gate-source voltage of the source follower transistor, and to make it possible to use, as the source follower transistor, a MOS transistor which has thin gate oxide film, which has short channel length and which has high current drive ability, even when a power supply voltage is high.
According to one aspect of the present invention, there is provided a semiconductor integrated circuit comprising: a source follower output transistor; and a clamp circuit for clamping a gate potential of the source follower output transistor by using a potential of a source electrode of the source follower output transistor as a reference potential.
In this case, it is preferable that the clamp circuit has finite high impedance ranges on the plus side and on the minus, side with respect to the reference potential.
According to another aspect of the present invention, there is provided a semiconductor integrated circuit having a voltage follower circuit, the voltage follower circuit comprising: a source follower output transistor whose source electrode and backgate electrode are mutually connected; a differential amplifier, via which an output of said source follower circuit is fed back to a gate electrode of the source follower output transistor; and a clamp circuit for clamping a gate potential of the source follower output transistor by using a potential of the source electrode and the backgate electrode of the source follower output transistor as a reference potential.
According to still another aspect of the present invention, there is provided a semiconductor integrated circuit having a voltage follower circuit, the voltage follower circuit comprising: a source follower output stage having an output n-channel type MOS transistor whose drain electrode is connected to a high potential power supply line and whose backgate electrode is connected to the source electrode thereof, and a divider circuit connected between the source electrode of the output n-channel type MOS transistor and the ground line and comprising a series connection of at least a first resistor and a second resistor; a differential amplifier which amplifies a difference voltage between a divided voltage from said divider circuit of said output stage and a reference voltage applied from an external source; wherein the divided voltage from the divider circuit of the output stage being fed back to the gate electrode of the output n-channel type MOS transistor via the differential amplifier; and a clamp circuit

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