Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Including additional component in same – non-isolated structure
Reexamination Certificate
1998-04-17
2001-08-14
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
Including additional component in same, non-isolated structure
C257S578000, C257S584000, C257S587000, C257S047000
Reexamination Certificate
active
06274921
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuits in which it is hard to cause a breakdown and leakage current to breakdown, of an oxide film of a bipolar transistor and an MOS transistor due to the formation of interconnections (including one having a spiral inductor and a pad) electrically connected to the bipolar transistor and the MOS transistor by patterning through plasma etching and, and a process for manufacturing the, semiconductor integrated circuit.
2. Description of the Prior Art
Progress in high integration of semiconductor integrated circuits has been made in recent years. With high integration, the distance between the base and emitter of a bipolar transistor that constitutes a semiconductor integrated circuit, has been reduced. In a bipolar transistor employed in a high-frequency circuit, for example, the distance between the base and emitter has been reduced to increase cut-off frequency. With its high integration as well, a gate oxide film of a MOS transistor that constitutes a semiconductor integrated circuit, has been reduced in thickness.
With a view toward implementing the high integration of such a semiconductor integrated circuit, plasma etching is used in a process for manufacturing bipolar and MOS transistors.
The term plasma etching means a method of etching using ions and atoms in a plasma produced by a glow discharge in a reactive gas. In this case, the state of the plasma depends on etching conditions such as the type of reactive gas, etc. The etching using the ions in the plasma is performed as follows: Electrons in the plasma, which have been produced by a glow discharge of a reactive gas between negative and positive electrodes, are allowed to rapidly reach both electrodes to thereby produce a negative potential between the two electrodes. Thereafter, ions in the plasma are accelerated under the negative potential to impact on a wafer.
Incidentally, the density of the plasma results in nonuniformity on the wafer surface due to the nonuniformity of the plasma upon plasma etching, whereby the wafer is locally charged within the wafer surface. Upon patterning by plasma etching, electrical charges are borne between upper and lower portions of a pattern due to overetching.
The above-described plasma etching has been used in the conventional manufacturing process of the semiconductor integrated circuit.
In a bipolar transistor of a DPSA (Double Poly-Si Self-Aligned) structure shown in
FIG. 15
, which is employed in a high-frequency circuit, for example, the thickness of an insulating oxide film
146
located between a base electrode
138
and an emitter electrode
142
is set to a range of 0.1 &mgr;m to 0.2 &mgr;m to reduce the distance between the base electrode
138
and the emitter electrode
142
. Therefore, when an interconnection
103
electrically connected to the base electrode
138
is formed by patterning through plasma etching, the interconnection
103
is charged by ions and electrons resultant from a plasma, so that a current flows between the base electrode
138
and the emitter electrode
142
through the insulating oxide film
146
located between the two electrodes. As a result, a problem arose in that a breakdown of the insulating oxide film
146
located between the base electrode
138
and the emitter electrode
142
due to plasma etching and a leakage current flowing between the base electrode
138
and the emitter electrode
142
incident to its breakdown would occur in the post-manufacture bipolar transistor. The manner in which the current flows between the base electrode
138
and the emitter electrode
142
through the insulating oxide film
146
located between the two electrodes, is shown in
FIG. 15
by the arrow indicated by a broken line.
Similarly, in a MOS transistor shown in
FIG. 16
, which responds to high integration, for example, the thickness of a gate oxide film
151
is set to about 1500 nm. Therefore, when an interconnection
103
electrically connected to a gate electrode
152
is formed by patterning through plasma etching, the interconnection
103
is charged by ions and electrons resultant from a plasma, so that a current flows between the gate electrode
152
and a substrate
131
through the gate oxide film
151
. As a result, a problem arose in that a breakdown of the gate oxide film
151
due to plasma etching and a leakage current flowing between the gate electrode
152
and the substrate
131
incident to its breakdown would occur in the post-manufacture MOS transistor. The manner in which the current flows between the gate electrode
152
and the substrate
131
through the gate oxide film
151
, is shown in
FIG. 16
by the arrow indicated by a broken line.
SUMMARY OF THE INVENTION
The present invention has been accomplished for solving the above-mentioned problems and it is an object of the present invention to provide a semiconductor integrated circuit which is in little danger of producing a breakdown of an oxide film due to plasma etching and a leakage current incident to its breakdown in post-manufacture bipolar and MOS transistors, and a process for manufacturing the semiconductor integrated circuit.
According to a first aspect of this invention, there is provided a semiconductor integrated circuit comprising a bipolar transistor, an interconnection electrically connected to a base electrode of the bipolar transistor, and a protective NMOS transistor having a drain electrically connected to the interconnection, a source electrically connected to ground and a gate electrode placed in a floating state upon formation of the interconnection by patterning through plasma etching, the protective NMOS transistor being in an OFF state free of the flow of a current between the source and drain thereof after the formation of the interconnection.
According to the first aspect, an advantageous effect is brought about in that since the semiconductor integrated circuit is constructed so as to have the bipolar transistor, the interconnection electrically connected to the base electrode of the bipolar transistor, and the protective NMOS transistor which includes the drain electrically connected to the interconnection, the source electrically connected to ground and the gate electrode placed in the floating state upon formation of the interconnection by patterning through plasma etching, and which is in the OFF state free of the flow of the current between the source and drain thereof after the formation of the interconnection, the semiconductor integrated circuit can reduce the risk of producing a breakdown of an insulating oxide film located between the base and emitter electrodes due to plasma etching and a leakage current flowing between the base and emitter electrodes incident to its breakdown in the post-manufacture bipolar transistor.
According to a second aspect of this invention, there is provided a semiconductor integrated circuit wherein an interconnection has a spiral inductor and a first portion for electrically connecting a base electrode of a bipolar transistor and the spiral inductor to each other.
According to a third aspect of this invention, there is provided a semiconductor integrated circuit wherein an interconnection has a pad and a first portion for electrically connecting a base electrode of a bipolar transistor and the pad to each other.
According to a fourth aspect of this invention, there is provided a semiconductor integrated circuit wherein an interconnection has a spiral inductor, a pad, a first portion for electrically connecting a base electrode of a bipolar transistor and the spiral inductor to each other, and a second portion for electrically connecting the spiral inductor and the pad to each other.
According to a fifth aspect of this invention, there is provided a semiconductor integrated circuit wherein an interconnection has a spiral inductor, a pad, a first portion for electrically connecting a base electrode of a bipolar transistor and the spiral inductor to each other, and a second portion for el
Chaudhuri Olik
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Rao Shrinivas H.
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