Semiconductor integrated circuit including an intrinsic MOS tran

Details Semiconductor integrated circuit including an intrinsic MOS tran Semiconductor integrated circuit including an intrinsic MOS tran

1990-07-31

1991-08-20

Prenty, Mark

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 2312, 357 58, 357 51, 357 91, 307231, 307304, 307363, H01L 2702, H01L 2912, H03K 3353, H03K 5153

Patent

active

050418939

ABSTRACT:
A semiconductor integrated cirucit for generating a reference voltage, including a semiconductor substrate, a first voltage terminal connected to a first voltage source, a resistor connected to the first voltage terminal, a second voltage terminal connected to a second voltage source, an intrinsic MOS and having a source, a drain, a gate and a channel having no ion-implantation for threshold control, a first wiring connected to the resistor and the source, a second wiring connected to the second voltage terminal and the drain, a third wiring connected to the drain and the gate, and an output terminal connected to the first wiring for connecting the resistor to the source. In addition, in one embodiment, there is further provided a power source voltage generating circuit formed in the semiconductor substrate, wherein a reference voltage input terminal of the semiconductor integrated circuit for generating the reference voltage is connected to the reference voltage output terminal, and a predetermined operation is performed in accordance with the potential of the reference voltage input terminal.

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