Semiconductor integrated circuit including a substrate having a

Details Semiconductor integrated circuit including a substrate having a Semiconductor integrated circuit including a substrate having a

1993-02-04

1994-12-20

LaRoche, Eugene R.

Static information storage and retrieval

Interconnection arrangements

365900, 365185, 365182, 365181, 257371, 257372, G11C 1134

Patent

active

053750837

ABSTRACT:
An object of the present invention is to provide a semiconductor integrated circuit in which an EEPROM is incorporated in a highly integrated microcomputer having a twin well structure. A twin well region including an n-well region, a p-well region, and a p-type substrate region surrounded by a p-well region are produced in a single semiconductor substrate. A supply voltage system made up of a CPU, a ROM or RAM, a UART, and EEPROM control systems to which the high voltage for the EEPROM is not applied is formed in the twin well region as a CMOS structure, enabling high density integration. A high-voltage system made up of an EEPROM memory cell array and an EEPROM peripheral high-voltage system in the p-type region have an NMOS structure. This arrangement minimizes the substrate effect and enables the high-voltage system to operate normally.

REFERENCES:
patent: 4907058 (1990-03-01), Sakai
patent: 5202579 (1993-04-01), Fujii et al.
patent: 5319604 (1994-06-01), Imondi et al.

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