Semiconductor integrated circuit including a master-slave...

Details Semiconductor integrated circuit including a master-slave... Semiconductor integrated circuit including a master-slave...

2009-06-15

2011-10-25

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S218000

Reexamination Certificate

active

08044695

ABSTRACT:
A semiconductor integrated circuit having a flip-flop with improve soft error resistance, including a controller which controls a clock signal generating circuit to output a first clock signal and a second clock signal with a timing so that logic of data retained in a first data retaining terminal becomes identical to logic of data retained in a third data retaining terminal, and then turns on a first switching circuit to connect between the first data retaining terminal and the first data retaining terminal.

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patent: 2006-115311 (2006-04-01), None
Ashish Goel, et al., “Low-Overhead Design of Soft-Error-Tolerant Scan Flip-Flops with Enhanced-Scan Capability,” 2006 IEEE, Asia and Smith Pacific Conference on Design Automation, pp. 665-670.
Japanese Office Action issued Nov. 9, 2010, in Patent Application No. 2008-155113 (with English-language translation).
W. J. Dally, et al., “Digital System Engineering Volume Basics”, Mar. 30, 2003, pp. 354-356.

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