Semiconductor integrated circuit including a filter with...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S553000, C327S555000

Reexamination Certificate

active

06670846

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including a filter in which yield reduction is minimized by adjusting the cut-off frequency in accordance with manufacturing variations in resistance elements and capacitance elements constituting the filter.
2. Description of Related Art
FIG. 7
shows a conventional filter-equipped semiconductor integrated circuit disclosed in Japanese patent application laid-open No. 61-189718 (1986), for example. In
FIG. 7
, the reference numeral
201
designates a differential operational amplifier; and
202
designates a resistance element connected to the inverting input terminal of the differential operational amplifier
201
. The reference numeral
203
designates a resistance element connected across the inverting input terminal and the output terminal of the differential operational amplifier
201
; and
204
designates a capacitance element connected in parallel with the resistance element
203
.
Next, the operation of the conventional circuit will be described.
The filter shown in
FIG. 7
is a known first-order active filter, and has a cut-off frequency given by
f
c
={fraction (1/27)}&pgr;(
R
f
C
f
)
0.5
  (1)
where R
f
is a resistance value of the resistance element
203
, and C
f
is a capacitance value of the capacitance element
204
.
With the foregoing configuration, the conventional filter-equipped semiconductor integrated circuit has a problem in that its cut-off frequency can deviate because of variations in manufacturing the resistance elements and capacitance element constituting the filter, and hence it cannot meet a cut-off frequency standard, resulting in a defective.
SUMMARY OF THE INVENTION
The present invention is implemented to solve the foregoing problem. It is therefore an object of the present invention to provide a filter-equipped semiconductor integrated circuit capable of minimizing the yield reduction by adjusting the cut-off frequency considering the manufacturing variations in the resistance elements and capacitance elements constituting the filter.
According to one aspect of the present invention, there is provided a filter-equipped semiconductor integrated circuit including: a filter including resistance elements, capacitance elements, each of which consists of a capacitance-value switching circuit for changing the capacitance value of the capacitance element, and operational amplifiers; and a time-constant detecting circuit for detecting a time constant of a capacitance element and a resistance element, which are provided independently of the capacitance elements and resistance elements of the filter. The capacitance values of the capacitance elements of the filter are adjusted in response to the time constant detected by the time-constant detecting circuit It offers an advantage of being able to detect and adjust the deviation of the cut-off frequency of the filter with ease.


REFERENCES:
patent: 4791379 (1988-12-01), Hughes
patent: 4835490 (1989-05-01), Mazzucco et al.
patent: 5416438 (1995-05-01), Shibata
patent: 5466976 (1995-11-01), Ichihara
patent: 5565812 (1996-10-01), Soenen
patent: 5914633 (1999-06-01), Comino et al.
patent: 6060935 (2000-05-01), Shulman
patent: 6107870 (2000-08-01), Kawano
patent: 6288669 (2001-09-01), Gata
patent: 6424209 (2002-07-01), Gorecki et al.
patent: 6452443 (2002-09-01), Thompson et al.
patent: 6509791 (2003-01-01), Segawa et al.
patent: 2003/0090316 (2003-05-01), Dathe et al.
patent: 63-51664 (1988-03-01), None
patent: 63-280504 (1988-11-01), None
patent: 61-189718 (1988-12-01), None
patent: 5-180881 (1993-07-01), None

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