Semiconductor integrated circuit having therein circuit for dete

Details Semiconductor integrated circuit having therein circuit for dete Semiconductor integrated circuit having therein circuit for dete

1990-10-31

1994-08-30

Beausoliel, Jr., Robert W.

Excavating

371 221, 307360, 307351, H04B 1700

Patent

active

053434790

ABSTRACT:
A semiconductor integrated circuit includes a plurality of input buffers, a plurality of high level signal abnormality detection circuits each connected to an output of a corresponding one of the input buffers, and a plurality of low level signal abnormality detection circuits each connected to an output of a corresponding one of the input buffers. A first concentrating circuit is connected to all the high level signal abnormality detection circuits so as to output a first abnormal signal when at least one of the high level signal abnormality detection circuits detects an abnormal high level signal, and a second concentrating circuit is connected to all the low level signal abnormality detection circuits so as to output a second abnormal signal when at least one of the low level signal abnormality detection circuits detects an abnormal low level signal.

REFERENCES:
patent: 3851189 (1974-11-01), Meyer
patent: 4321489 (1982-03-01), Higuchi et al.
patent: 4943945 (1990-07-01), Lai
patent: 4965800 (1990-10-01), Farnbach
patent: 5132929 (1992-07-01), Ochii
Electronic Circuit Design, An Engineering Approach, Savant, Jr. et al., 1987, pp. 721-722.

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