Semiconductor integrated circuit having test circuit

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371 48, H04B 1700, G06F 1100

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054187915

ABSTRACT:
A semiconductor integrated circuit includes a plurality of data buses, and emitter-follower circuits arranged in the data buses. Read parts, which are coupled to the emitter-follower circuits, read data transferred via the data buses via the emitter-follower circuits. A test part, which is coupled to the emitter-follower circuits, determines, in a test mode, whether or not the data transferred via the data buses have an error and outputs a test output signal to one of the data buses. The output test signal has a potential level higher than that of the data transferred via the data buses in a normal mode.

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Patent Abstracts of Japan, vol. 014, No. 521 (P-1131) Nov. 15, 1990 & JP-A-22 18 095 (NEC Corp) Abstract.
Y. Okajima et al., "7ns 4MB BiCMOS SRAM with Parallel Testing Circuit," IEEE International Solid-State Circuits Conference, vol. 34, Feb. 1991, New York, US, pp. 54-55, XP000237798.

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