Semiconductor integrated circuit having regularly arranged trans

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Integrated structure

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327566, 257205, H01L 2710, H03K 19173

Patent

active

056940785

ABSTRACT:
A semiconductor integrated circuit includes a chip having an element forming surface with a side thereof extending along a first direction, an output buffer portion provided on the element forming surface of the chip, a plurality of output transistors having different emitter areas provided on the element forming surface of the chip and arranged approximately in a line along a second direction, which is perpendicular to the first direction, and a pad provided on the element forming surface of the chip. An output circuit is formed by the output buffer portion, a portion or all of the output transistors and the pad. The output buffer portion, the output transistors and the pad are arranged approximately in a line along the second direction.

REFERENCES:
patent: 4591894 (1986-05-01), Kawakami
patent: 4809029 (1989-02-01), Matsumura et al.
patent: 4920398 (1990-04-01), Yoshio et al.
patent: 4947233 (1990-08-01), Aso
patent: 5124776 (1992-06-01), Tanizawa et al.
patent: 5329156 (1994-07-01), Bartlow
Goodenough, "Mixed-Mode Arrays Give Designers Options," Electronic Design, Oct. 13, 1988, pp. 149-154.

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