Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Reexamination Certificate
2009-06-15
2011-12-20
Dickey, Thomas L (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
C257SE27025
Reexamination Certificate
active
08080834
ABSTRACT:
A semiconductor integrated circuit includes a substrate, an oxide layer formed on an upper surface of the substrate, a plurality of polysilicon members arranged at constant intervals in a matrix on an upper surface of the oxide layer and including at least one first polysilicon member and a plurality of second polysilicon members, and a diffusion layer formed in the substrate under the first polysilicon member and electrically coupled to an interconnect for supplying a first power supply voltage, wherein the first polysilicon member is situated at an outermost periphery of the matrix and electrically coupled to an interconnect for supplying a second power supply voltage, and the plurality of second polysilicon members are situated inside the outermost periphery of the matrix.
REFERENCES:
patent: 6396123 (2002-05-01), Nagaoka
patent: 6429469 (2002-08-01), Allen et al.
patent: 2003/0169101 (2003-09-01), Yamamoto et al.
patent: 2005/0116268 (2005-06-01), Tahira et al.
patent: 2007/0045770 (2007-03-01), Aoki
patent: 02-069972 (1990-03-01), None
patent: 2001-118988 (2001-04-01), None
Komuro Hideyuki
Nozoe Koji
Arent & Fox LLP
Dickey Thomas L
Fujitsu Semiconductor Limited
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