Semiconductor integrated circuit having interconnection with imp

Details Semiconductor integrated circuit having interconnection with imp Semiconductor integrated circuit having interconnection with imp

1991-09-11

1993-08-31

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437 34, 437 78, H01L 21265

Patent

active

052408671

ABSTRACT:
A semiconductor integrated circuit comprises a substrate of a first semiconductor type doped by a first impurity element with a first impurity density, the first semiconductor type being one of p-type and n-type semiconductors, a conductive layer formed on a back surface of the substrate, a first layer of a second semiconductor type doped by a second impurity element different from the first impurity element and formed on a front surface of the substrate, the second semiconductor type being the other of the p-type and n-type semiconductors and the first layer having a second impurity density lower than the first impurity density, a second layer of the first semiconductor type formed on the first layer for forming circuit elements therein, a first region of the second semiconductor type extending from a top surface of the first layer and reaching a top surface of the second layer, and a second region of the first semiconductor type extending from a top surface of the substrate and reaching the top surface of said second layer, the first layer and the second region forming a conductive path for supplying a power source voltage to the circuit elements in the second layer from the back surface of the substrate.

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International Publication No. Wo86/00755, filed Jan. 30, 1986 (International Application No. PCT/US85/00941), "Integrated Circuit Having Buried Oxide Isolation and Low Resistivity Substrate for Power Supply Interconnection", Birrittella et al. (Motorola, Inc.).
IEEE International Solid State Circuits Conference, vol. 32, Feb. 1989, New York, "A 50k-Gate ECl Array with Substrate Power Supply", Norihito Miyoshi et al., pp. 182-183.

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