Semiconductor integrated circuit having built-in PLL circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C331S016000, C375S376000

Reexamination Certificate

active

07015735

ABSTRACT:
A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.

REFERENCES:
patent: 4546330 (1985-10-01), Okada
patent: 5604466 (1997-02-01), Dreps et al.
patent: 5886551 (1999-03-01), Narahara
patent: 6819197 (2004-11-01), Maldonado
patent: 6826248 (2004-11-01), Kushibe
Koo, Y. et al, “A Fully Integrated CMOS Frequency Synthesizer With Charge-Averaging Charge Pump and Dual-Path Loop Filter for PCS- and Cellular-CDMA Wireless System”, IEEE Journal of Solid-State Circuits, vol. 37, No. 5, May 2002, pp. 536-542.

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