Wave transmission lines and networks – Plural channel systems – Having branched circuits
Patent
1994-06-28
1995-09-05
Gensler, Paul
Wave transmission lines and networks
Plural channel systems
Having branched circuits
333161, 326101, 327565, H01P 512, H01P 900
Patent
active
054482089
ABSTRACT:
A semiconductor integrated circuit has a parallel conductor transmission line including a plurality of signal paths branching at a node. The signal paths have phase compensation section for obtaining a phase constant of the transfer constant thereof, the phase constant being inversely proportional to the length of the signal paths. The phase compensation section is implemented by covering a microstrip line by a insulator layer having a high dielectric constant or implemented by a second ground conductor disposed opposite to the microstrip conductor with a thin insulator layer of a high dielectric constant. The integrated circuit comprises a plurality of square gate blocks having a plurality of logic gates arranged in an array. A signal source node is connected via respective input signal nodes of the gate blocks to the logic gates in the gate blocks through the respective signal paths having the phase compensation section.
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patent: 5043792 (1991-08-01), Adechi
patent: 5239215 (1993-08-01), Yamaguchi
Brennan et al., Delay Line For Use With Integrated Circuits, IBM Tech. Discl. Bulletin, vol. 9, No. 11, Apr. 1967.
Gensler Paul
NEC Corporation
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