Semiconductor integrated circuit having a pattern layout applica

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357 41, 357 45, 357 47, H01L 2702

Patent

active

051555700

ABSTRACT:
A semiconductor integrated circuit is formed on a semiconductor chip (1) and it includes: a plurality of mat regions (A to T) each including a plurality of circuit elements (10 to 13); partition regions (4) for spacing the mat regions (A to T) from each other; and a pair of power supply line (2) and ground line (3) disposed on each of the partition regions (4). An electronic circuit formed on the semiconductor chip (1) includes circuit blocks having different functions but it is designed for a unit of each mat (A to T) not for a unit of each circuit block.

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English Translation of Japanese Patent Application Laying-Open No. 62-12147 of lines 13-18 of upper right column of p. 2 and line 18 of upper right column of p. 2 to line 3 of lower left column of p. 2, 1 page.

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