Semiconductor integrated circuit having a clock and latch circui

Details Semiconductor integrated circuit having a clock and latch circui Semiconductor integrated circuit having a clock and latch circui

1999-07-15

2000-11-07

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

36523008, 257337, G11C 800

Patent

active

061446149

ABSTRACT:
A semiconductor integrated circuit includes an internal clock generating circuit generating an internal clock, and a flip-flop circuit configured so that n latch circuits are cascaded via switch circuits performing switching operations in synchronism with the internal clock where n is an integer equal to or greater than 2. An initialization control circuit is provided so that it applies, after power on, an initialization signal to the flip-flop circuit whereby a first latch circuit among the n latch circuits is initialized. The initialization control circuit causes the internal clock generating circuit to generate the internal clock during a predetermined period so that the second through nth latch circuits are sequentially initialized.

REFERENCES:
patent: 5812491 (1998-09-01), Shinozaki et al.
patent: 5889709 (1999-03-01), Fukuda
patent: 5890186 (1999-03-01), Sato et al.
patent: 5953284 (1999-09-01), Baker et al.

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