Excavating
Patent
1993-12-27
1995-12-05
Canney, Vincent P.
Excavating
371 27, G06F 1100
Patent
active
054736188
ABSTRACT:
The semiconductor integrated circuit having a built-in test circuit of the present invention is an IC having a circuit for screening products for shipment by measuring the maximum operating frequency of the IC by outputting the propagation state of a signal within the test circuit within an operation cycle of the IC, the circuit being composed of: an external clock pulse input terminal; a clock driver that inputs the external clock pulse and converts it to clock pulses of two phases, one being in phase with the external clock pulse and the other being in reverse phase; a test terminal into which is inputted a test execution signal; a one-shot circuit that generates a high-active output pulse when an active signal is inputted; a sequential circuit that performs transition of an output value in accordance with an output pulse from the one-shot circuit; a test circuit made up of a number n of latch circuits of identical or differing structure that hold and successively output to a next circuit a high-level signal D of an inputted logic value 1; a test register made up of a number n of serially connected latch circuits that hold the output of each of the latch circuits of the test circuit; and a data selector that switches between outputting to a number n of output terminals either the output value of the test circuit or the operation output of the IC.
REFERENCES:
patent: 5109383 (1992-04-01), Chujo
patent: 5210759 (1993-05-01), DeWitt et al.
Arai Masashi
Takeshita Yuuichi
Canney Vincent P.
NEC Corporation
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