Image analysis – Image compression or coding
Reexamination Certificate
2006-08-22
2006-08-22
Alavi, Amir (Department: 2621)
Image analysis
Image compression or coding
C341S058000
Reexamination Certificate
active
07095895
ABSTRACT:
Provided is a circuit for implementing the coding of a DVI (Digital Visual Interface) standard in a small size of hardware, at high speed, and with low power consumption. In a DVI coding circuit, the input of a number-of-levels comparison circuit22for judging which of the number of bits at a level “H” and the number of bits at a level “L” is larger in the input signal of the coding circuit is set at 7 bits. The output of a number-of-transitions decrease circuit23for decreasing the number of the transitions between adjacent two bits can be inverted for 4 bits on the basis of the output of the number-of-levels comparison circuit22. A DC balance circuit24for keeping the direct current-wise balance of the output signal of the coding circuit includes a 4-bit register31, a number-of-levels difference computation circuit27, a condition decision circuit28, a bit inversion circuit29and an addition circuit30. The number-of-levels difference computation circuit27receives as its inputs the 8 bits of the output of the number-of-transitions decrease circuit23and the 4 bits of the input signal of the coding circuit.
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“Digital Visual Interface DVI”, Rev. 1.0, Apr. 2, 1999, corresponding to Digital Display Working Group, pp. 24-32.
Okamura Jun-ichi
Tsujita Tatsuo
Alavi Amir
Sughrue & Mion, PLLC
Thine Electronics Inc.
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