Semiconductor integrated circuit for performing data transfer

Coded data generation or conversion – Digital code to digital code converters – Multiple conversions using same converter

Reexamination Certificate

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Details

C341S144000, C341S155000, C341S108000, C341S110000

Reexamination Certificate

active

06211802

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a data transfer circuit for a semiconductor integrated circuit and, more particularly, to a data transfer circuit for a computer having a data transfer data bus line.
Conventionally, a microcomputer integrated on a semiconductor substrate reads out and executes a program from a ROM (Read Only Memory).
FIG. 7
shows the arrangement of a conventional microcomputer around the ROM. In
FIG. 7
, binary data of a ROM
2
addressed by a program counter
1
are output parallel onto a data bus
3
and sent to an instruction decoder
4
.
In the microcomputer having this arrangement, data flowing through the data bus is generally fixed to a positive or negative logic level. If data on the data bus line
3
is illicitly read out by bringing a probe or the like into contact with the data bus, a program stored in the ROM
2
can be undesirably estimated to pose a security problem.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a data transfer circuit for a semiconductor integrated circuit capable of realizing a security function with respect to an illicit data read on the data bus line.
To achieve the above object, according to the present invention, there is provided a data transfer circuit for a semiconductor integrated circuit, comprising a first circuit for outputting data of a plurality of bits, a second circuit for receiving the data from the first circuit via a data bus, first data conversion means for converting the data from the first circuit by a first conversion rule and outputting the data to the data bus, and second data conversion means for converting the data from the data bus back to original data by a second conversion rule and outputting the data to the second circuit.


REFERENCES:
patent: 5404141 (1995-04-01), Ohara
patent: 2-212952 (1990-08-01), None
patent: 4-036834 (1992-02-01), None
patent: 4-352257 (1992-12-01), None
patent: 6-044141 (1994-02-01), None
patent: 7-295893 (1995-11-01), None
patent: 9-282234 (1997-10-01), None

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