Boots – shoes – and leggings
Patent
1990-11-26
1992-05-26
Malzahn, David H.
Boots, shoes, and leggings
365177, G06F 748
Patent
active
051173824
ABSTRACT:
A semiconductor integrated circuit is provided for performing an arithmetic operation using an arithmetic operation circuit. The integrated circuit includes a read bus for connecting the arithmetic operation circuit with a plurality of registers which store input data and/or output data of said arithmetic operation circuit. A precharge and sense circuit connects said arithmetic operation circuit to said read bus. The precharge and sense circuit includes a precharge circuit to precharge the read bus to a first level before the read operation, and a sense circuit to detect that the level of the read bus has discharged to a second, lower level after the read operation begins. In this way, the integrated circuit can detect very slight potential variations on said read bus.
REFERENCES:
patent: 3919536 (1975-11-01), Cochran et al.
patent: 4276616 (1981-06-01), Hennig
patent: 4437171 (1984-03-01), Hudson
patent: 4563751 (1986-01-01), Barker
patent: 4665505 (1987-05-01), Miyakawa et al.
patent: 4694202 (1987-09-01), Iwamura et al.
patent: 4713796 (1987-12-01), Ogive et al.
patent: 4769561 (1988-09-01), Iwamura et al.
Mov et al., "High Speed Microprocessors", 1983 IEEE International Solid State Circuits Conference, pp. 28-29, Feb. 23, 1983.
Hotta Takashi
Iwamura Masahiro
Kurita Kouzaburou
Maejima Hideo
Masuda Ikuro
Hitachi , Ltd.
Malzahn David H.
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