Electricity: motive power systems – Switched reluctance motor commutation control
Reexamination Certificate
1998-02-26
2002-08-13
Nappi, Robert E. (Department: 2837)
Electricity: motive power systems
Switched reluctance motor commutation control
C318S132000, C318S434000, C318S459000, C318S500000, C318S145000, C388S928100, C388S911000
Reexamination Certificate
active
06433496
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit for motor control, and more specifically to a semiconductor integrated circuit for controlling a motor at a constant speed by a PLL (phase locked loop) and PWM (pulse width modulation).
2. Description of Related Art
Referring to
FIG. 10
, there is shown a block diagram of one example of the prior art motor controlling semiconductor integrated circuit, which is generally designated with Reference Numeral
100
. The semiconductor integrated circuit
100
is connected to a three-phase motor (spindle motor)
1
to be controlled, a reference oscillator
2
for generating a reference clock used for setting the number of revolution of the motor
1
, a sense resistor
3
for detecting the current flowing through an armature coil at a stator side of the motor
1
, and a DC power supply (not shown).
In the semiconductor integrated circuit
100
, Reference Numerals
4
,
5
and
6
designate output p-channel MOS transistors for controlling the timing of supplying the current to respective armature coils of the motor
1
, and Reference Numerals
7
,
8
and
9
denote output n-channel MOS transistors for controlling the amount of the current supplied to the respective armature coils of the motor
1
. The transistors
4
and
7
,
5
and
8
, and
6
and
9
are connected in series, respectively. Respective sources of the transistors
4
,
5
and
6
are connected in common to a power supply voltage terminal VDD, and respective sources of the transistors
7
,
8
and
9
are connected in common to one end of the sense resistor
3
which is connected externally. The other end of the sense resistor
3
is connected to ground. A connection node between the transistors
4
and
7
, a connection node between the transistors
5
and
8
, and a connection node between the transistors
6
and
9
are connected to output terminals Out
1
, Out
2
and Out
3
, respectively, which are connected to the armature coils of the motor
1
, respectively.
Reference Numerals
10
,
11
and
12
designate counter electromotive force comparators, which have their inverting input (−) connected through delay circuits
13
,
14
and
15
to the armature coils of the motor
1
, respectively, and their non-inverting input (+) connected in common to a neutral point of the motor
1
.
Reference Numeral
16
denotes a phase comparing circuit having one input connected to an output of the reference oscillator
2
which is connected externally, and the other input connected to an output of the counter electromotive force comparator
10
. Reference Numeral
17
indicates a low pass filter having an input connected to an output of the phase comparing circuit
16
, and Reference Numeral
18
shows an integrator constituted of an operational amplifier having its non-inverting input (+) connected to an output of the low pass filter
17
and its inverting input (−) connected through a capacitor to an output of the operational amplifier itself and through a resistor to the source of the transistors
7
,
8
and
9
. Reference Numeral
19
designates a triangular wave generating circuit, and Reference Numeral
20
denotes a comparator having its non-inverting input (+) connected to an output of the integrator
18
and its inverting input (−) connected to an output of the triangular wave generating circuit
19
.
Reference Numeral
21
indicates an output condition setting circuit receiving the output of the counter electromotive force comparators
10
,
11
and
12
, for outputting control signals T
1
, T
2
, T
3
, C
1
, C
2
and C
3
to a gate of the transistors
4
,
5
,
6
,
7
,
8
and
9
, respectively.
As shown in
FIG. 11
, which is a logic diagram of one example of the phase comparing circuit
16
, the phase comparing circuit
16
includes a digital phase comparator
22
composed of NAND gates and latches formed of NAND gates, a p-channel MOS transistor
23
and an n-channel MOS transistor
24
connected in series between the power supply voltage terminal VDD and the ground, and an inverter
25
. One input “R” of the digital phase comparator
22
is connected to receive the reference clock CLK outputted from the reference oscillator
2
and the other input “V” of the digital phase comparator
22
is connected to the output of the counter electromotive force comparator
10
. One output “U” of the digital phase comparator
22
is connected to a gate of the transistor
23
, and the other output “D” of the digital phase comparator
22
is supplied through the inverter
25
to a gate of the transistor
24
. A connection node between the transistors
23
and
24
is connected to the low pass filter
17
.
Now, an operation of the semiconductor integrated circuit having the above mentioned construction will be described also with reference to FIG.
12
.
By on-off controlling the transistors
4
,
5
,
6
,
7
,
8
and
9
so as to cause a current to flow through each two of the three-phase armature coils, a rotor rotates in the motor. The current direction is caused to cyclically take six current directions of Out
3
to Out
2
, Out
3
to Out
1
, Out
2
to Out
1
, Out
2
to Out
3
, Out
1
to Out
3
, and Out
1
to Out
2
, in the named order. A counter electromotive force voltage generated at the end of each armature coil at each time the current direction is changed, is supplied through the delay circuit
13
,
14
or
15
to the counter electromotive force comparator
10
,
11
or
12
, respectively. The counter electromotive force comparators
10
,
11
and
12
compare the respective counter electromotive force voltages with the potential of the neutral point of the armature coils, to generate rotor position detection signals P
1
, P
2
and P
3
as shown in (a) of
FIG. 12
to the output condition setting circuit
21
. At the same time, the position detection signal P
1
(or P
2
or P
3
) is supplied to the input “V” of the phase comparing circuit
16
. Incidentally, since the six current directions are cyclically repeated as mentioned above, the delay circuits
13
,
14
and
15
delay the phase of the counter electromotive force voltage generated at the end of the armature coils by 60 degrees, so that the next condition of the current direction is supplied through the counter electromotive force comparators
10
,
11
and
12
to the output condition setting circuit
21
as the position detection signals P
1
, P
2
and P
3
.
The timing of supplying the current to the respective armature coils of the motor
1
, is controlled as follows. In response to the position detection signals P
1
, P
2
and P
3
, the output condition setting circuit
21
generate timing signals T
1
, T
2
and T
3
as shown in (b) of FIG.
12
. These timing signals T
1
, T
2
and T
3
are supplied to the gate of the transistors
4
,
5
and
6
, respectively, for the purpose of on-off controlling the transistors
4
,
5
and
6
, thereby to control the timings of supplying the current to the respective armature coils of the motor
1
.
On the other hand, the amount of the current supplied to the respective armature coils of the motor
1
is controlled as follows: The reference clock CLK having the frequency as a desired rotational frequency of the motor
1
is supplied from the reference oscillator
2
to the input “R” of the phase comparing circuit
16
, and at the same time, the position detection signal P
1
is supplied to the input “V” of the phase comparing circuit
16
. The phase comparing circuit
16
compares the phase of the position detection signal P
1
with the phase of the reference clock CLK, to output a phase difference signal through the low pass filter
17
to the non-inverted input (+) of the operational amplifier of the integrator
18
. A load current flowing through the armature coils of the motor
1
is converted by the sense resistor
3
into a voltage, which is supplied to the resistor of the integrator
18
. The voltage integrated in the integrator
18
and the output of the t
Duda Rina I.
Foley & Lardner
Nappi Robert E.
NEC Corporation
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