Static information storage and retrieval – Addressing – Sync/clocking
Patent
1997-03-03
1998-04-14
Le, Vu A.
Static information storage and retrieval
Addressing
Sync/clocking
365194, G11C 700
Patent
active
057401233
ABSTRACT:
A semiconductor integrated circuit has a primary delay controller for receiving an external control signal, at least one intermediate delay controller cascaded to the primary delay controller, and a final delay controller cascaded to the intermediate delay controller. The semiconductor integrated circuit further has a phase comparator and a pulse signal generator. The phase comparator compares a phase of the external control signal with a phase of an output signal of the final delay controller, and controls delays in the primary, intermediate, and final delay controllers in accordance with the comparison result. The pulse signal generator receives the external control signal and an output signal of any one of the primary and intermediate delay controllers, and provides a pulse signal whose pulse width is dependent on a period of the external control signal and a value specific to the received output signal. This semiconductor integrated circuit is able to change the pulse width of the pulse signal in response to a change in the frequency of the external clock signal.
REFERENCES:
patent: 5313422 (1994-05-01), Houston
patent: 5493538 (1996-02-01), Bergman
patent: 5566130 (1996-10-01), Durham et al.
Fujitsu Limited
Le Vu A.
LandOfFree
Semiconductor integrated circuit for changing pulse width accord does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit for changing pulse width accord, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit for changing pulse width accord will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-642967