Fishing – trapping – and vermin destroying
Patent
1994-10-05
1996-05-21
Fourson, George
Fishing, trapping, and vermin destroying
437194, 437195, H01L 21441
Patent
active
055189610
ABSTRACT:
In a semiconductor device of gate self-alignment structure, at least two lamination layer portions each composed of a gate electrode, an insulating film and a conductive film are formed on a semiconductor substrate with a contact hole sandwiched therebetween. A wire is formed on the respective lamination layer portions. Further, a total thickness of the conductive film and the wire is determined to be large enough to prevent impurities implanted into the wire from being doped into the gate electrode. In formation of the gate self-alignment structure, an insulating side wall is formed on the side wall of the contact hole, to insulate the gate electrode from the wire or vice versa.
REFERENCES:
patent: 5019527 (1991-05-01), Ohshima et al.
patent: 5037777 (1991-08-01), Mele et al.
patent: 5075762 (1991-12-01), Kondo et al.
patent: 5200358 (1993-04-01), Bollinger et al.
patent: 5215933 (1993-06-01), Araki
patent: 5270240 (1993-12-01), Lee
patent: 5369303 (1994-11-01), Wei
Booth Richard A.
Fourson George
Kabushiki Kaisha Toshiba
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