Semiconductor integrated circuit device with memory cells connec

Static information storage and retrieval – Interconnection arrangements – Transistors or diodes

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365104, 365154, 357 59, G11C 506, G11C 1140

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047824654

ABSTRACT:
A memory array is divided into a plurality of circuit blocks which each include wirings composed of electrically conductive polycrystalline silicon layers and circuit elements that will be operated by signals supplied via the wirings. Each circuit block is served with a signal via an aluminum layer. The signal supplied to the circuit block is transmitted to the circuit elements via an internal wiring. If the aluminum layer is broken, the circuit blocks formed on the remote side beyond the broken portion fail to work properly. Therefore, breakage of the aluminum layer can be easily detected. Further, since signals are supplied to the circuit blocks via an aluminum layer, the memory array operates at increased speeds.

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patent: 4142176 (1979-02-01), Dozier
patent: 4218693 (1980-08-01), Gee et al.
patent: 4223333 (1980-09-01), Masuora
patent: 4460911 (1984-07-01), Salters
patent: 4679171 (1987-07-01), Logwood et al.
IEEE International Solid-State Circuits Conference Feb. 23, 1983, pp. 58-59.
Electrotechnik, 61 H.4 Feb. 22, 1980, pp. 17-16, 18 and 21.
Elektronik-Mar. 11, 1983, pp. 43-47.
IEEE Transactions on Electron Devices-vol. ED-29, No. 10; Oct. 1982, pp. 1535-1541.

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