Semiconductor integrated circuit device with I/O cell and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S724000, C257S725000, C257S726000

Reexamination Certificate

active

06919632

ABSTRACT:
A semiconductor integrated circuit device includes connection members arranged on an entire chip, a first I/O cell which is arranged on the periphery of the chip and has a first end portion on the peripheral side of the chip and a second end portion on the center side of the chip, a second I/O cell which is arranged inside the first I/O cell and has a third end portion on the peripheral side of the chip and a fourth end portion on the center side of the chip, first terminals formed on the first end portion and connected to the connection members, second terminals formed on the second end portion and connected to an internal circuit of the chip, third terminals formed on the third end portion and connected to the internal circuit, and fourth terminals formed on the fourth end portion and connected to the connection members.

REFERENCES:
patent: 4811073 (1989-03-01), Kitamura et al.
patent: 4868630 (1989-09-01), Tanizawa et al.
patent: 4883980 (1989-11-01), Morimoto et al.
patent: 4920398 (1990-04-01), Yoshio et al.
patent: 5060046 (1991-10-01), Shintani
patent: 6287482 (2001-09-01), Hamura et al.
patent: 01238140 (1989-09-01), None
patent: 03147349 (1991-06-01), None

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