Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
1999-09-28
2002-12-17
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C257S501000, C257S505000, C257S506000, C257S553000
Reexamination Certificate
active
06495896
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of The Invention
The present invention relates generally to a semiconductor integrated circuit device which has a well having the same conductive type as that of a substrate and being pn-separated from the substrate and which has various gate insulator films having different thickness, and a method for producing the same. More specifically, the invention relates to a technique for reducing the number of masks for use in the production of the semiconductor integrated circuit device.
The present invention also relates generally to a semiconductor integrated circuit device including two kinds of transistors having the same conductive channel. More specifically, the invention relates to a method for producing a semiconductor integrated circuit device, which forms wells for element regions by ion implantation before forming an element isolating insulator film.
2. Related Background Art
A typical CMOS semiconductor integrated circuit device has an n-type well for forming a p-channel MOSFET (which will be hereinafter referred to as a “PMOS”), and a p-type well for forming an n-channel MOSFET (which will be hereinafter referred to as an “NMOS”).
Some of such typical CMOS semiconductor integrated circuit devices have a well which is pn-separated from a substrate and which has the same conductive type as that of the substrate. For example, there is a semiconductor integrated circuit device wherein an NMOS, in which a back gate potential is the same as the potential of a p-type substrate, and an NMOS, in which a back gate potential is different from the potential of the p-type substrate, are integrated on the single p-type substrate. In the case of such a semiconductor integrated circuit device, a p-type well pn-separated from the p-type substrate is formed, and an NMOS, in which the back gate potential is different from the p-type substrate, is formed in the p-type well.
FIG. 72
is a sectional view of a semiconductor integrated circuit device having a p-type well which is pn-separated from a p-type substrate. FIGS.
73
(A) through
73
(E) are profile diagrams showing the distribution of an impurity in a substrate, wherein FIG.
73
(A) shows a profile along line
73
A—
73
A in
FIG. 72
, FIG.
73
(B) showing a profile along line
73
B—
73
B in
FIG. 72
, FIG.
73
(C) showing a profile along line
73
C—
73
C in
FIG. 72
, FIG.
73
(D) showing a profile along line
73
D—
73
D in
FIG. 72
, and FIG.
73
(E) showing a profile along line
73
E—
73
E in FIG.
72
.
However, in a process for producing a semiconductor integrated circuit device having a p-type well pn-separated from a p-type substrate, it is required to add a photolithography step of forming the p-type well pn-separated from the p-type substrate, to a typical process for producing a semiconductor integrated circuit device. Therefore, the number of masks for use in the photolithography step increases, so that the manufacturing costs increase.
As the prior art of the present invention, a method for producing the semiconductor integrated circuit device shown in
FIG. 72
will be described below.
FIGS.
74
(A) through
74
(C),
75
(A) through
75
(C) and
76
(A) and
76
(B) are sectional views showing principal steps of producing the semiconductor integrated circuit device shown in FIG.
72
.
First, as shown in FIG.
74
(A), an element isolating region
102
is formed on the surface of a p-type silicon substrate
101
by the LOCOS method to define divided element regions
103
on the surface of the substrate
101
. Then, the surface of the (silicon) substrate
101
exposed to the element regions
103
is, e.g., thermally oxidized, to form buffer oxide films
104
on the surfaces of the element regions
103
. FIGS.
77
(A) through
77
(E) show impurity profiles in the substrate
101
after the buffer oxide films
4
are formed. FIG.
77
(A) shows a profile along line
77
A—
77
A in FIG.
74
(A), FIG.
77
(B) showing a profile along line
77
B—
77
B in FIG.
74
(A), FIG.
77
(C) showing a profile along line
77
C—
77
C in FIG.
74
(A), FIG.
77
(D) showing a profile along line
77
D—
77
D in FIG.
74
(A), and FIG.
77
(E) showing a profile along line
77
E—
77
E in FIG.
74
(A). As shown in FIGS.
77
(A) through
77
(E), after the buffer oxide films
4
are formed, the conductive impurities in the substrate
101
are only p-type impurities originally contained in the substrate
101
.
Then, as shown in FIG.
74
(B), a photoresist is applied on the substrate
101
to form a photoresist film
105
. Then, holes
106
a
,
106
b
are formed in the photoresist film
105
by the photolithography method. The hole
106
a
is formed so as to correspond to a region wherein an n-type well is formed, and the hole
106
b
is annularly formed so as to surround a region wherein a p
−
-type well separated from the substrate
101
is formed. Then, using the photoresist film
105
as a mask, an n-type impurity
107
is ion-implanted into the substrate
101
. Thus, an n-type well
108
-
1
, and an n-type well
108
-
2
surrounding a region, in which the p
−
-type well separated from the substrate
101
is formed, are simultaneously formed. FIGS.
77
(F) through
77
(J) show impurity profiles in the substrate
1
after the n-type wells
108
-
1
and
108
-
2
are formed. FIG.
77
(F) shows a profile along line
77
F—
77
F in FIG.
74
(B), FIG.
77
(G) showing a profile along line
77
G—
77
G in FIG.
74
(B), FIG.
77
(H) showing a profile along line
77
H—
77
H in FIG.
74
(B), FIG.
77
(I) showing a profile along line
77
I—
77
I in FIG.
74
(B), and FIG.
77
(J) showing a profile along line
77
J—
77
J in FIG.
74
(B). As shown in FIGS.
77
(F) through
77
(J), the n-type impurity
107
is introduced so that the density thereof is higher than that of the p-type impurity originally contained in the substrate
101
, to form the n-type wells
108
-
1
and
108
-
2
in the substrate
101
.
Then, as shown in FIG.
74
(C), after the photoresist film
105
is removed from the substrate
101
, a photoresist is applied again to form a photoresist film
109
. Then, a hole
110
is formed in the photoresist film
109
by the photolithography method. The hole
110
is formed so as to correspond to a region wherein a p
−
-type well connected to the substrate
101
is formed. Then, using the photoresist film
109
as a mask, an n-type impurity
111
is ion-implanted into the substrate
101
. Thus, an embedded n-type well
112
apart from the surface of the substrate
101
is formed in a region surrounded by the n-type well
108
-
2
of the substrate
1
. FIGS.
78
(A) through
78
(E) show impurity profiles in the substrate
101
after the n-type well
112
is formed. FIG.
78
(A) shows a profile along line
78
A—
78
A in FIG.
74
(C), FIG.
78
(B) showing a profile along line
78
B—
78
B in FIG.
74
(C), FIG.
78
(C) showing a profile along line
78
C—
78
C in FIG.
74
(C), FIG.
78
(D) showing a profile along line
78
D—
78
D in FIG.
74
(C), and FIG.
78
(E) showing a profile along line
78
E—
78
E in FIG.
74
(C). As shown in FIGS.
78
(A) through
78
(E), the n-type impurity
111
is introduced so that the density thereof is higher than that of the p-type impurity originally contained in the substrate
1
, to form the embedded n-type well
112
in the substrate
101
.
Then, as shown in FIG.
75
(A), after the photoresist film
109
is removed from the substrate
101
, a photoresist is applied again to form a photoresist film
113
thereon. Then, holes
114
-
1
and
114
-
2
are formed in the photoresist film
113
by the photolithography method. The hole
114
-
1
is formed so as to correspond to a region wherein a p
−
-type well connected to the substrate
101
is formed, and the hole
114
-
2
is formed so as to correspond to a region wherein p
−
-type well pn-separated from the substrate
101
is formed. Then, using the photoresist film
113
as a mask, a p-type impurity
115
is ion-implanted into the substrate
101
. Thus, a p
−
-type well
116
-
1
is formed in the substrate
101
, and
Aritome Seiichi
Shimizu Kazuhiro
Takeuchi Yuji
Yaegashi Toshitake
Fenty Jesse A.
Hogan & Hartson L.L.P.
Jackson, Jr. Jerome
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