Semiconductor integrated circuit device with dual thickness poly

Details Semiconductor integrated circuit device with dual thickness poly Semiconductor integrated circuit device with dual thickness poly

1978-07-10

1979-07-24

Clawson, Jr., Joseph E.

357 23, 357 41, 357 71, H01L 2904

Patent

active

041625064

ABSTRACT:
A semiconductor integrated circuit device consisting of silicon gate MOS transistors. A polycrystalline silicon wiring layer is formed on a field insulating layer and connected with a polycrystalline gate electrode layer having a smaller thickness than that of the wiring layer, whereby the resistance of the wiring layer is reduced without making the gate electrode layer thick.

REFERENCES:
patent: 3891190 (1975-06-01), Vadasz
patent: 3967981 (1976-07-01), Yamazaki
patent: 4057824 (1977-11-01), Woods
patent: 4125854 (1978-11-01), McKenny et al.

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