Semiconductor integrated circuit device with an enlarged interna

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means

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257206, 257786, H01L 2348

Patent

active

051628937

ABSTRACT:
A semiconductor integrated circuit device includes a semiconductor chip, and bonding pads used for interfacing with an external device. The bonding pads are arranged in an outer portion of a chip peripheral area on the semiconductor chip. A pair of N-channel and P-channel transistor areas is provided for two or more neighboring bonding pads among the bonding pads, and is arranged in the vicinity of the two or more neighboring bonding pads in the chip peripheral area. The pair of N-channel and P-channel transistor areas is used for forming a peripheral circuit used for interfacing with the external device through the related two or more bonding pads. The peripheral circuit related to the two or more neighboring bonding pads is formed by the pair of N-channel and P-channel transistor areas.

REFERENCES:
patent: 4591894 (1986-05-01), Kawakami
patent: 4733288 (1988-03-01), Sato
patent: 4766475 (1988-08-01), Kawashima
patent: 4819047 (1989-04-01), Gilfeather et al.
patent: 4825107 (1989-04-01), Naganuma et al.
patent: 4893168 (1990-01-01), Takahashi et al.
patent: 4945395 (1990-07-01), Suehiro
patent: 4947233 (1990-08-01), Aso

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